Image sensor

Patent metadata

Field	Value
Publication number	US-2024250103-A1
Application number	US-202318395827-A
Country	US
Kind code	A1
Filing date	Dec 26, 2023
Priority date	Jan 25, 2023
Publication date	Jul 25, 2024
Grant date	—

Abstract

An image sensor includes a substrate including a pixel section and a separation pattern disposed in the substrate and surrounding the pixel section. The separation pattern includes a first sub-separation pattern that extends in a first direction, and a second sub-separation pattern that extends in a second direction that intersects the first direction. The pixel section includes a device isolation pattern that defines an active region in the pixel section, and at least one gate pattern on the active region. The gate pattern extends along a third direction from the first sub-separation pattern through the active region and the device isolation pattern to the second sub-separation pattern. The third direction intersects the first direction and the second direction. The gate pattern has a first surface and a second surface that are opposite to each other. The first surface extends linearly from the first sub-separation pattern to the second sub-separation pattern.

First claim

What is claimed is:

1 . An image sensor, comprising:
a substrate that includes a pixel section; and a separation pattern disposed in the substrate, the separation pattern surrounding the pixel section, wherein the separation pattern includes:
a first sub-separation pattern that extends in a first direction parallel to an upper surface of the substrate; and
a second sub-separation pattern that extends in a second direction that intersects the first direction and is parallel to the upper surface of the substrate,
wherein the pixel section includes:
a device isolation pattern that defines an active region in the pixel section; and
at least one gate pattern on the active region,
wherein the at least one gate pattern extends along a third direction from the first sub-separation pattern through the active region and the device isolation pattern to the second sub-separation pattern, the third direction intersecting the first direction and the second direction and parallel to the upper surface of the substrate, wherein the at least one gate pattern has a first surface and a second surface that are opposite to each other, wherein the first surface extends linearly from the first sub-separation pattern to the second sub-separation pattern.

2 . The image sensor of claim 1 , wherein:
the second surface includes a first sub-surface that extends along the third direction, a second sub-surface that extends along the second direction, and a third sub-surface that extends along the first direction, and the second surface extends from the first sub-separation pattern to the second sub-separation pattern.

3 . The image sensor of claim 2 , wherein the first sub-surface is parallel to the first surface.

4 . The image sensor of claim 1 , wherein:
the at least one gate pattern includes a first portion, a second portion, and a third portion disposed along the third direction; the second portion extends from the first sub-separation pattern to the active region; the third portion extends from the second sub-separation pattern to the active region; and wherein the first portion is interposed between the second portion and the third portion, the first portion directly contacting the second portion and the third portion on the active region.

5 . The image sensor of claim 4 , wherein:
a length of the first portion in the third direction is equal to a first distance; a length of the first portion in a fourth direction that intersects the third direction and is parallel to the upper surface of the substrate is equal to a second distance; and the first distance is greater than the second distance.

6 . The image sensor of claim 5 , wherein:
the active region includes a first impurity region and a second impurity region spaced apart from the first impurity region; the pixel section includes at least one transistor, the at least one transistor includes: the first and second impurity regions; and the at least one gate pattern between the first impurity region and the second impurity region, wherein an effective channel length of the transistor is equal to the second distance, and wherein an effective channel width of the transistor is equal to the first distance.

7 . The image sensor of claim 6 , wherein the at least one transistor is a source follower transistor.

8 . The image sensor of claim 1 , wherein:
the substrate has a first surface and a second surface opposite to the first surface; the active region is adjacent to the second surface of the substrate; and the substrate further includes a photoelectric conversion region in the substrate.

9 . The image sensor of claim 8 , further comprising:
a color filter on the first surface of the substrate; and a microlens on the color filter.

10 . The image sensor of claim 1 , further comprising a buried gate pattern on the active region,
wherein the active region further includes a floating diffusion region adjacent to the buried gate pattern, and wherein the buried gate pattern extends into the substrate.

11 . The image sensor of claim 6 , further comprising:
a first active contact directly connected to the first impurity region; and a second contact directly connected to the second impurity region.

12 . An image sensor including a pixel section, wherein the pixel section includes:
an active region in the pixel section, the active region including a first impurity region and a second impurity region; and a gate pattern on the active region, the gate pattern having a first surface and a second surface that are opposite to each other, wherein the gate pattern is between the first impurity region and the second impurity region, wherein the first surface is close to the first impurity region and extends linearly, and wherein an area of the first impurity region is less than an area of the second impurity region.

13 . The image sensor of claim 12 , wherein the second surface is close to the second impurity region, the second impurity region including a first sub-surface, a second sub-surface, and a third sub-surface, the second impurity region further including a first corner where the first sub-surface and the second sub-surface meet each other and a second corner where the first sub-surface and the third sub-surface meet each other.

14 . The image sensor of claim 12 , wherein the second impurity region includes:
a first edge region that extends in a first direction; and a second edge region that extends in a second direction that intersects the first direction.

15 . The image sensor of claim 14 , further comprising:
a first active contact on the first impurity region; and a second active contact on the second impurity region, wherein the second active contact is on the first edge region or the second edge region.

16 . The image sensor of claim 15 , wherein the second active contact is on a central portion of the second impurity region.

17 . An image sensor, comprising:
a substrate that includes a plurality of pixel sections; and a separation pattern in the substrate and positioned between adjacent pixels of the plurality of pixel sections, wherein the separation pattern includes:
a first sub-separation pattern that extends in a first direction parallel to an upper surface of the substrate; and
a second sub-separation pattern that extends in a second direction that intersects the first direction and is parallel to the upper surface of the substrate,
wherein the plurality of pixel sections include:
a first pixel section and a second pixel section that are adjacent to each other in the first direction;
a third pixel section adjacent to the first pixel section in the second direction; and
a fourth pixel section adjacent to the second pixel section in the second direction and adjacent to the third pixel section in the first direction,
wherein each of the first to fourth pixel sections includes;
a device isolation pattern that defines an active region in the first to fourth pixel sections; and
a transistor that corresponds to each of the first to fourth pixel sections,
wherein the active region includes a first impurity region and a second impurity region spaced apart from each other, the active region comprising first to fourth active regions in the first to fourth pixel sections, respectively, wherein the transistor includes:
the first impurity region;
the second impurity region; and
a gate pattern between the first impurity region and the second impurity region, the gate pattern comprising first to fourth gate patterns disposed in

Assignees

• Samsung Electronics Co Ltd

Inventors

• Kim Seonok
• Oh Kwanyoung
• Kim Hyungchae
• Jang Dongyoung

Classifications

• H10F39/813

  Electronic components shared by multiple pixels, e.g. one amplifier shared by two pixels · CPC title

• H10F39/8063 Primary

  Microlenses · CPC title

• H10F39/807 Primary

  Pixel isolation structures · CPC title

• H10F39/8053

  Colour filters · CPC title

• H10F39/8037

  the integrated elements comprising a transistor · CPC title