Methods of forming bonding structures

Patent metadata

Field	Value
Publication number	US-2024203923-A1
Application number	US-202318313786-A
Country	US
Kind code	A1
Filing date	May 8, 2023
Priority date	Dec 15, 2022
Publication date	Jun 20, 2024
Grant date	—

Abstract

A method includes forming a conductive pad over a substrate, forming a multi-layer passivation structure on the conducive pad, patterning a top portion of the multi-layer passivation structure to form a first opening, forming a mask film on sidewall surfaces of the patterned top portion of the multi-layer passivation structure, after the forming of the mask film, performing a first etching process to remove a portion of the multi-layer passivation structure directly under the first opening to form a second opening, after the performing of the first etching process, selectively removing the mask film, performing a second etching process to remove a portion of the multi-layer passivation structure directly under the second opening, thereby forming a third opening exposing the conductive pad, and forming a bonding structure in the third opening, where an etchant of the second etching process is different than an etchant of the first etching process.

First claim

What is claimed is:

1 . A method comprising:
forming a first dielectric structure over a conductive pad; depositing a first etch stop layer on the first dielectric structure; forming a second dielectric structure on the first etch stop layer; depositing a second etch stop layer on the second dielectric structure; forming a third dielectric structure on the second etch stop layer; performing a first etching process to form a first opening extending through the third dielectric structure and exposing the second etch stop layer; forming a mask film extending along sidewalls of the third dielectric structure exposed by the first opening; performing a second etching process to vertically extend the first opening to expose the first etch stop layer; selectively removing the mask film; performing a third etching process to further vertically extend the first opening to expose the conductive pad; and forming a conductive bonding structure in the further extended first opening.

2 . The method of claim 1 , wherein the forming of the first dielectric structure comprises:
forming an anti-reflective layer on a top surface of the conductive pad; and conformally depositing an oxide layer over the anti-reflective layer, wherein a portion of the oxide layer is in direct contact with a sidewall surface of the conductive pad.

3 . The method of claim 1 , wherein an etchant of the third etching process comprises a mixture of CF 4 and C 4 F 8 .

4 . The method of claim 3 , wherein a ratio of a volume of CF 4 to a volume of C 4 F 8 is greater than 2.

5 . The method of claim 3 , wherein an etchant of the first etching process is different than the etchant of the third etching process.

6 . The method of claim 1 , wherein the forming of the mask film is performed before the performing of the second etching process, and the selectively removing of the mask film is performed before the performing of the third etching process.

7 . The method of claim 1 , wherein the forming of the second dielectric structure comprises:
forming an oxide liner sandwiched between a first oxide layer and a second oxide layer; forming a third etch stop layer over the oxide liner and on the second oxide layer; and forming a third oxide layer on the third etch stop layer.

8 . The method of claim 7 , wherein the oxide liner comprises silicon oxide, and a ratio of an atomic percentage of silicon to an atomic percentage of oxygen is between about 0.3 and about 0.5.

9 . The method of claim 7 , wherein the forming of the oxide liner is conducted under a radio frequency bias power between about 400 W and about 600 W.

10 . The method of claim 7 , wherein the second oxide layer comprises a lower portion deposited under a first deposition rate and an upper portion deposited under a second deposition rate greater than the first deposition rate.

11 . The method of claim 1 , wherein, in a cross-sectional view, a shape of the bonding structure bonding structure comprises a funnel shape.

12 . A method, comprising:
providing a workpiece comprising a conductive pad formed over a substrate; forming a multi-layer passivation structure on the conducive pad; patterning a top portion of the multi-layer passivation structure to form a first opening; forming a mask film on sidewall surfaces of the patterned top portion of the multi-layer passivation structure; after the forming of the mask film, performing a first etching process to remove a portion of the multi-layer passivation structure directly under the first opening to form a second opening; after the performing of the first etching process, selectively removing the mask film; performing a second etching process to remove a portion of the multi-layer passivation structure directly under the second opening, thereby forming a third opening exposing the conductive pad, wherein an etchant of the second etching process is different than an etchant of the first etching process; and forming a conductive bonding structure in the third opening.

13 . The method of claim 12 , wherein the etchant of the second etching process comprises a mixture of CF 4 and C 4 F 8 .

14 . The method of claim 12 , wherein the etchant of the first etching process comprises a mixture of C 4 F 6 and C 4 F 8 .

15 . The method of claim 12 , wherein the first etching process is performed at a first pressure, the second etching process is performed at a second pressure smaller than the first pressure.

16 . The method of claim 12 , wherein the first etching process is performed at a first bias power, the second etching process is performed at a second bias power smaller than the first bias power.

17 . The method of claim 12 , wherein the performing of the first etching process comprises performing a number of etching processes configured to etch different layers in the multi-layer passivation structure.

18 . The method of claim 12 , further comprising:
after the performing of the second etching process, cleaning the third opening by applying a polymer layer on a bottom surface of the third opening and then selectively removing the polymer layer.

19 . A semiconductor structure, comprising:
a conductive pad formed over a substrate; a multi-layer passivation structure over the conductive pad, wherein the multi-layer passivation structure comprises a dielectric film, and a ratio of an atomic percentage of silicon to an atomic percentage of oxygen is between about 0.3 and about 0.5; and a bonding structure extending through the multi-layer passivation structure and electrically coupled to the conductive pad, wherein, in a cross-sectional view, a shape of the bonding structure comprises a funnel shape.

20 . The semiconductor structure of claim 19 , wherein the conductive pad comprises aluminum, and the bonding structure comprises copper.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Huang Hsing-Yuan
• Lee Chin-Szu
• Ho Yi Chen

Classifications

• H10W90/731

  of die-attach connectors · CPC title

• H10W90/28

  the stacked chips having different sizes, e.g. chip stacks having a pyramidal shape · CPC title

• H10W90/22

  the stacked chips being on both top and bottom sides of a package substrate, interposer or RDL · CPC title

• H10W72/952

  comprising metals or metalloids, e.g. PbSn, Ag or Cu · CPC title

• H10W72/874

  On different surfaces · CPC title