Molded package having an electrically conductive clip with a convex curved surface attached to a semiconductor die

US2024087993A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2024087993-A1
Application numberUS-202217944657-A
CountryUS
Kind codeA1
Filing dateSep 14, 2022
Priority dateSep 14, 2022
Publication dateMar 14, 2024
Grant date

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A molded package includes: a semiconductor die; a substrate attached to a bottom side of the semiconductor die; an electrically conductive clip attached to a top side of the semiconductor die; and a mold compound encapsulating the semiconductor die. A top side of the electrically conductive clip faces away from the semiconductor die and has an exposed flat surface that overlays the semiconductor die and is not covered by the mold compound. A bottom side of the electrically conductive clip faces the semiconductor die and has a convex curved surface that is attached to the top side of the semiconductor die. Along a vertical cross-section of the electrically conductive clip from the exposed flat surface to the convex curved surface, the electrically conductive clip has a plano-convex shape delimited by the exposed flat surface and the convex curved surface. A method of producing the molded package is also described.

First claim

Opening claim text (preview).

What is claimed is: 1 . A molded package, comprising: a semiconductor die; a substrate attached to a bottom side of the semiconductor die; an electrically conductive clip attached to a top side of the semiconductor die; and a mold compound encapsulating the semiconductor die, wherein a top side of the electrically conductive clip faces away from the semiconductor die and has an exposed flat surface that overlays the semiconductor die and is not covered by the mold compound, wherein a bottom side of the electrically conductive clip faces the semiconductor die and has a convex curved surface that is attached to the top side of the semiconductor die, wherein along a vertical cross-section of the electrically conductive clip from the exposed flat surface to the convex curved surface, the electrically conductive clip has a plano-convex shape delimited by the exposed flat surface and the convex curved surface. 2 . The molded package of claim 1 , wherein a bottom side of the substrate that faces away from the semiconductor die is not covered by the mold compound, such that the molded package has double-sided cooling via the tops side of the electrically conductive clip and the bottom side of the substrate. 3 . The molded package of claim 2 , wherein the semiconductor die is a vertical power transistor die having a drain or collector terminal at the top side of the semiconductor die that is attached to the convex curved surface of the electrically conductive clip and a source or emitter terminal at the bottom side of the semiconductor die that is attached to the substrate. 4 . The molded package of claim 1 , wherein an edge of the electrically conductive clip that extends between the exposed flat surface and the convex curved surface has at least one feature that enhances locking between the mold compound and the electrically conductive clip. 5 . The molded package of claim 4 , wherein the at least one feature comprises at least one step covered by the mold compound. 6 . The molded package of claim 4 , wherein the at least one feature comprises at least one groove filled by the mold compound. 7 . The molded package of claim 4 , wherein the at least one feature comprises a curved surface covered by the mold compound. 8 . The molded package of claim 4 , wherein the at least one feature comprises a first step transition from the exposed flat surface and a second step transition from the convex curved surface, and wherein both the first step transition and the second step transition are covered by the mold compound. 9 . The molded package of claim 1 , wherein the substrate is a die paddle of a lead frame, wherein the electrically conductive clip is attached to one or more leads of the lead frame at an end of the electrically conductive clip opposite the semiconductor die, and wherein the mold compound partly encapsulates the one or more leads. 10 . The molded package of claim 1 , wherein the convex curved surface of the electrically conductive clip is attached to the top side of the semiconductor die by solder, and wherein a thickness of the solder is at a minimum at a vertex of the convex curved surface and increases outward from the vertex. 11 . The molded package of claim 1 , wherein the exposed flat surface has a larger area than the convex curved surface. 12 . The molded package of claim 1 , wherein one or more edges of the exposed flat surface extend beyond a corresponding edge of the convex curved surface. 13 . A molded package, comprising: a semiconductor die; a substrate attached to a bottom side of the semiconductor die; an electrically conductive clip attached to a top side of the semiconductor die; and a mold compound encapsulating the semiconductor die, wherein a top side of the electrically conductive clip faces away from the semiconductor die and has a flat surface that overlays the semiconductor die and is not covered by the mold compound, wherein a bottom side of the electrically conductive clip faces the semiconductor die and has a convex curved surface that is attached to the top side of the semiconductor die, wherein the electrically conductive clip has a nonuniform thickness between the flat surface and the convex curved surface, wherein the nonuniform thickness is maximum at a vertex of the convex curved surface and decreases outward from the vertex. 14 . A method of producing a molded package, the method comprising: attaching a bottom side of a semiconductor die to a substrate; attaching an electrically conductive clip to a top side of the semiconductor die such that a convex curved surface at a bottom side of the electrically conductive clip is attached to the top side of the semiconductor die and a flat surface at a top side of the electrically conductive clip faces away from the semiconductor die and overlays the semiconductor die; encapsulating the semiconductor die and the electrically conductive clip in a mold compound; and removing the mold compound from the flat surface of the electrically conductive clip, wherein along a vertical cross-section of the electrically conductive clip between the flat surface and the convex curved surface, the electrically conductive clip has a plano-convex shape delimited by the flat surface and the convex curved surface. 15 . The method of claim 14 , further comprising: prior to attaching the electrically conductive clip to the top side of the semiconductor die, stamping the bottom side of the electrically conductive clip to form the convex curved surface while the top side of the electrically conductive clip is supported by a rigid flat member that preserves the flat surface. 16 . The method of claim 14 , further comprising: prior to attaching the electrically conductive clip to the top side of the semiconductor die, stamping the bottom side and/or the top side of the electrically conductive clip to displace material in an edge region of the electrically conductive clip, wherein the material displaced by the stamping forms at least one feature configured to enhance locking between the mold compound and the electrically conductive clip in the edge region of the electrically conductive clip. 17 . The method of claim 16 , wherein the material displaced by the stamping forms at least one step in the edge region of the electrically conductive clip. 18 . The method of claim 16 , wherein the material displaced by the stamping forms at least one groove in the edge region of the electrically conductive clip. 19 . The method of claim 16 , wherein the material displaced by the stamping has a curved surface. 20 . The method of claim 16 , wherein the material displaced by the stamping forms a first step transition from the flat surface and a second step transition from the convex curved surface. 21 . The method of claim 14 , wherein the substrate is a die paddle of a lead frame, the method further comprising: attaching the electrically conductive clip to one or more leads of the lead frame at an end of the electrically conductive clip opposite the semiconductor die, wherein the mold compound partly encapsulates the one or more leads after the encapsulating. 22 . The method of claim 14 , wherein attaching the electrically conductive clip to the top side of the semiconductor die comprises: attaching the convex curved surface of the electrically conductive clip to the top side of the semiconductor die by solder, wherein a thickness of the solder is at a minimum at a vert

Assignees

Inventors

Classifications

  • Die-attach connectors · CPC title

  • between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

  • the semiconductor body being completely enclosed · CPC title

  • Manufacture or treatment · CPC title

  • Additional interconnections in combination with leadframes · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US2024087993A1 cover?
A molded package includes: a semiconductor die; a substrate attached to a bottom side of the semiconductor die; an electrically conductive clip attached to a top side of the semiconductor die; and a mold compound encapsulating the semiconductor die. A top side of the electrically conductive clip faces away from the semiconductor die and has an exposed flat surface that overlays the semiconducto…
Who is the assignee on this patent?
Infineon Technologies Ag
What technology area does this patent fall under?
Primary CPC classification H10W70/424. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Mar 14 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).