Current change mitigation policy for limiting voltage droop in graphics logic
US-9250910-B2 · Feb 2, 2016 · US
System maximum current protection
US9477243B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9477243-B2 |
| Application number | US-201414579794-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 22, 2014 |
| Priority date | Dec 22, 2014 |
| Publication date | Oct 25, 2016 |
| Grant date | Oct 25, 2016 |
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Abstract
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A method and apparatus for providing proactive current protection. In one embodiment, the method comprises: prior to transitioning to a new state for an integrated circuit (IC), calculating a sum of expected powers for a plurality of domains in the IC by calculating an expected current for each of the plurality of domains based on an individual domain frequency in the new state and multiplying the expected current with its associated voltage for each of the plurality of domains for the new state; comparing the sum to a power limit; and if the sum is greater than the power limit, then reducing the individual domain frequency associated with at least one domain in the plurality of domains to maintain the total instantaneous power of the IC below the power limit.
First claim
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We claim: 1. A method comprising: prior to transitioning to a new state for an integrated circuit (IC), calculating a sum of expected powers for a plurality of domains in the IC by calculating an expected current for each of the plurality of domains based on an individual domain frequency in the new state and multiplying the expected current with its associated voltage for each of the plurality of domains for the new state; comparing the sum to a power limit; and if the sum is…
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- What does patent US9477243B2 cover?
- A method and apparatus for providing proactive current protection. In one embodiment, the method comprises: prior to transitioning to a new state for an integrated circuit (IC), calculating a sum of expected powers for a plurality of domains in the IC by calculating an expected current for each of the plurality of domains based on an individual domain frequency in the new state and multiplying …
- Who is the assignee on this patent?
- Intel Corp
- What technology area does this patent fall under?
- Primary CPC classification G05F1/10. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Oct 25 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).