Top side cooled semiconductor packages

Patent metadata

Field	Value
Publication number	US-2023420329-A1
Application number	US-202217849316-A
Country	US
Kind code	A1
Filing date	Jun 24, 2022
Priority date	Jun 24, 2022
Publication date	Dec 28, 2023
Grant date	—

Abstract

Top-side cooled semiconductor packages are disclosed. A top-side cooled semiconductor package may be a leaded or a leadless semiconductor package. A top-side cooled semiconductor package can include built-in electrical isolation for a semiconductor die within a housing of the semiconductor package. A top-side cooled semiconductor package may include one or more arrangements of creepage extension structures. A creepage extension structure may be arranged as part of a top side of a housing, of part of at least one peripheral side of the housing, as part of a bottom side of the housing, or combinations thereof.

First claim

1 . A top-side cooled semiconductor package comprising:
a housing; a first contact within the housing at a top side of the housing, the first contact included in a thermal transfer path for the top-side cooled semiconductor package; a semiconductor die within the housing below the first contact, the semiconductor die comprising a contact pad at a first side of the semiconductor die; a second contact within the housing at a bottom side of the housing; an electrical connector operably connecting the second contact to the contact pad of the semiconductor die; and a creepage extension structure that extends into a side of the housing, the creepage extension structure comprising one or more trenches.

2 . The top-side cooled semiconductor package of claim 1 , wherein:
the contact pad is a first contact pad; the semiconductor die further comprises a second contact pad at a second side of the semiconductor die; and the first contact is operably connected to the second contact pad of the semiconductor die.

3 . The top-side cooled semiconductor package of claim 2 , wherein:
the semiconductor die includes a diode; the first contact pad is a first terminal contact pad operably connected to a first terminal of the diode; and the second contact pad is a second terminal contact pad operably connected to a second terminal of the diode.

4 . The top-side cooled semiconductor package of claim 2 , wherein:
the semiconductor die includes a transistor; the first contact pad is a first terminal contact pad operably connected to a first terminal of the transistor; the second contact pad is a second terminal contact pad operably connected to a second terminal of the transistor; and the semiconductor die further comprises a third terminal contact pad at the first side of the semiconductor die, the third terminal contact pad operably connected to a third terminal of the transistor.

5 . The top-side cooled semiconductor package of claim 1 , further comprising a power substrate between the first contact and the semiconductor die.

6 . The top-side cooled semiconductor package of claim 5 , wherein the power substrate comprises an insulating layer between a top conductive layer and a bottom conductive layer.

7 . The top-side cooled semiconductor package of claim 6 , wherein the power substrate is a direct bond copper substrate.

8 . The top-side cooled semiconductor package of claim 6 , wherein:
the electrical connector is a first electrical connector; the contact pad is a first contact pad; the semiconductor die comprises a second contact pad at a second side of the semiconductor die, the second contact pad operably connected to the bottom conductive layer of the power substrate; and the top-side cooled semiconductor package further comprises:
a third contact within the housing at the bottom side of the housing; and
a second electrical connector operably connecting the third contact to the bottom conductive layer of the power substrate.

9 . The top-side cooled semiconductor package of claim 8 , wherein:
the first electrical connector is one of a first wire bond, a first conductive segment, or a first conductive clip; and the second electrical connector is one of a second wire bond or a second conductive segment, or a second conductive clip.

10 . The top-side cooled semiconductor package of claim 8 , wherein:
the semiconductor die comprises a metal-oxide-semiconductor field-effect transistor (MOSFET); the first contact pad is a source contact pad operably connected to a source of the MOSFET; the second contact pad is a drain contact pad operably connected to a drain of the MOSFET; the semiconductor die further comprises a gate contact pad at the first side of the semiconductor die, the gate contact pad operably connected to a gate of the MOSFET; and the top-side cooled semiconductor package further comprises a third electrical connector operably connecting the gate contact pad to a gate pin at the bottom side of the housing.

11 . The top-side cooled semiconductor package of claim 10 , further comprising a fourth electrical connector operably connecting a kelvin pin on the bottom side of the housing to the source contact pad of the semiconductor die.

12 . The top-side cooled semiconductor package of claim 1 , wherein:
the side of the housing is the top side of the housing; and the creepage extension structure provides a creepage distance between a pin or a lead and the first contact that is in a range from twelve millimeters (mm) to twenty mm.

13 . The top-side cooled semiconductor package of claim 12 , wherein the creepage extension structure includes at least one trench that further extends into at least one peripheral side of the housing.

14 . The top-side cooled semiconductor package of claim 1 , wherein the creepage extension structure provides a creepage distance that is in a range from five millimeters (mm) to fifteen mm or in a range from three mm to ten mm.

15 . The top-side cooled semiconductor package of claim 1 , wherein the top-side cooled semiconductor package is a leadless top-side cooled semiconductor package.

16 . A system, comprising:
a top-side cooled semiconductor package, the top-side cooled semiconductor package comprising a housing having a top side and a bottom side; a heat sink operably connected to the top side of the housing; and a circuit board operably connected to the bottom side of the housing, wherein the top-side cooled semiconductor package comprises:
a first contact within the housing at the top side of the housing, the first contact and the heat sink included in a thermal transfer path for the top-side cooled semiconductor package;
a semiconductor die within the housing below the first contact, the semiconductor die comprising a contact pad at a first side of the semiconductor die;
a second contact within the housing at a bottom side of the housing;
an electrical connector operably connecting the second contact to the contact pad of the semiconductor die; and
a creepage extension structure that extends into at least one side of the housing, the creepage extension structure comprising one or more trenches.

17 . The system of claim 16 , wherein:
the top-side cooled semiconductor package is operably connected to a first side of the circuit board; and the system further comprises an electronic component operably attached to a second side of the circuit board.

18 . The system of claim 16 , wherein:
the contact pad is a first contact pad; the semiconductor die further comprising a second contact pad at a second side of the semiconductor die; and the first contact is operably connected to the second contact pad of the semiconductor die.

19 . (canceled)

20 . (canceled)

21 . The system of claim 16 , wherein the top-side cooled semiconductor package further comprises a power substrate positioned between the first contact and the semiconductor die.

22 . (canceled)

23 . The system of claim 21 , wherein:
the electrical connector is a first electrical connector; the contact pad is a first contact pad; the semiconductor die further comprises a second contact pad at a second side of the semiconductor die, the second contact pad operably connected to a second conductive layer of the power substrate; and the top-side cooled semiconductor package further comprises:
a third contact within the housing at the bottom side of the housing; and
a second electrical conn

Assignees

• Wolfspeed Inc

Inventors

• Salman Adil
• Chandrasekaran Ajay Sekar
• Saxena Kuldeep

Classifications

• H10W72/884

  Die-attach connectors and bond wires · CPC title

• H10W40/255

  having a laminate or multilayered structure, e.g. direct bond copper [DBC] ceramic substrates · CPC title

• H10W40/228

  the projecting parts being wire-shaped or pin-shaped · CPC title

• H10W42/80

  protecting against overcurrent or overload, e.g. fuses or shunts (integrated devices comprising arrangements for electrical protection H10D89/60) · CPC title

• H10W70/466

  Tape carriers or flat leads · CPC title