System for Deriving Electrical Characteristics and Non-Transitory Computer-Readable Medium

US2023274417A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2023274417-A1
Application numberUS-202318315046-A
CountryUS
Kind codeA1
Filing dateMay 10, 2023
Priority dateAug 7, 2019
Publication dateAug 31, 2023
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An object of the present disclosure is to provide a system for deriving a type of defect of a semiconductor element and a non-transitory computer-readable medium. The system receives, from the image acquisition tool, image data obtained by sequentially irradiating a plurality of patterns provided on the semiconductor wafer with a beam and extracts characteristics of the plurality of patterns sequentially irradiated with a beam from the received image data, the characteristics being included in the image data, or receives characteristics of the plurality of patterns sequentially irradiated with a beam from the image acquisition tool, the characteristics being extracted from the image data (Step 603), and derives (Step 605) a type of a defect by referring to (Step 604) related information for the characteristics of the plurality of patterns, the related information storing the characteristics of the plurality of patterns and types of defects in association with each other.

First claim

Opening claim text (preview).

1 . An inspection system for a semiconductor wafer that is configured to be communicable with an image acquisition tool and inspects an electric circuit formed on a semiconductor wafer from image data acquired from the image acquisition tool or characteristics extracted from the image data, the system comprising: a computer system; and an arithmetic module that is executed by the computer system; wherein the computer system receives, from the image acquisition tool, image data obtained by sequentially irradiating a plurality of contacts included in a transistor provided on the semiconductor wafer with a beam and extracts characteristics of the plurality of contacts sequentially irradiated with the beam from the image data, the characteristics being included in the image data, or receives characteristics of the plurality of contacts sequentially irradiated with the beam, the characteristics being extracted from the image data; and outputs reliability information by referring to related information with the characteristics of the plurality of contacts, wherein the related information stores the characteristics of the plurality of contacts and the reliability information of the semiconductor device in association with each other. 2 . The inspection system for the semiconductor wafer according to claim 1 , wherein the characteristics of the plurality of contacts are obtained when the plurality of contacts are irradiated with the beam at respectively different timings. 3 . The inspection system for the semiconductor wafer according to claim 1 , wherein the characteristics of the plurality of contacts are obtained when a beam irradiation point of the image acquisition tool is moved in a plurality of directions relative to the plurality of contacts. 4 . The inspection system for the semiconductor wafer according to claim 1 , wherein the related information is a database storing a plurality of characteristics and the reliability information of the transistor in association with each other, the plurality of characteristics being obtained by sequentially irradiating the plurality of contacts included in the semiconductor device with the beam. 5 . The inspection system for the semiconductor wafer according to claim 1 , wherein the plurality of contacts includes two or more from a source contact, a gate contact, and a drain contact. 6 . The inspection system for the semiconductor wafer according to claim 5 , wherein, by charge being accumulated in the gate contact, the gate of the transistor is opened or the source and the drain of the transistor are electrically connected. 7 . The inspection system for the semiconductor wafer according to claim 1 , Wherein the image data is data obtained by beam scanning of the image acquisition tool such that the plurality of contacts are included in a field of view. 8 . The inspection system for the semiconductor wafer according to claim 7 , wherein the image data is data obtained by beam scanning of the image acquisition tool in an arrangement direction of the plurality of contacts according to an arrangement order. 9 . The inspection system for the semiconductor wafer according to claim 1 , wherein the image data is a voltage contrast image data. 10 . The inspection system for the semiconductor wafer according to claim 1 , wherein the plurality of contacts includes a word line contact and a storage node contact connected to the transistor. 11 . The inspection system for the semiconductor wafer according to claim 10 , wherein the computer system extracts characteristics of a plurality of storage node contacts from a plurality of image data related to the storage node contacts obtained upon repeatedly sequentially irradiating the word line contact and the storage node contact with the beam, and outputs the reliability information based on extracted characteristics of the plurality of storage node contacts. 12 . The inspection system for the semiconductor wafer according to claim 1 , wherein the reliability information includes any of a durability in the transistor, a guarantee time, information related to a number of times of guarantee or characteristics deterioration, information related to whether the transistor is normal, or information related to whether the transistor is defective. 13 . An inspection system for a semiconductor wafer that is configured to be communicable with an image acquisition tool and inspects a transistor formed on a semiconductor wafer from image data acquired from the image acquisition tool or characteristics extracted from the image data, the system comprising: a computer system; and an arithmetic module that is executed by the computer system; wherein the computer system receives, from the image acquisition tool, the image data obtained by irradiating, with a beam, a storage node contact connected to the transistor as a number of times of irradiating, with the beam for applying stress, a word line contact connected to the transistor increases and extracts characteristics of a plurality of storage node contacts from the received image data, the characteristics being included in the image data, or receives characteristics of the plurality of storage node contacts, the characteristics being extracted from the image data; and outputs reliability information of the transistor by referring to related information with the characteristics of the plurality of storage node contacts, wherein the related information stores the characteristics of the plurality of storage node contacts and the reliability information of the transistor in association with each other. 14 . A non-transitory computer-readable medium storing a program that is configured to instruct a processor to: receive, from an image acquisition tool, image data obtained by sequentially irradiating a plurality of contacts included in a transistor provided on a semiconductor wafer with a beam and further to extract characteristics of the plurality of contacts sequentially irradiated with a beam from the image data, the characteristics being included in the image data, or to receive the characteristics of the plurality of contacts sequentially irradiated with the beam, the characteristics being extracted from the image data; and output reliability information by referring to related information with the characteristics of the plurality of contacts, wherein the related information stores the characteristics of the plurality of contacts and the reliability information of the transistor in association with each other. 15 . A non-transitory computer-readable medium storing a program that is configured to instruct a processor to: receive, from an image acquisition tool, image data obtained by irradiating, with a beam, a storage node contact connected to a transistor as a number of times of irradiating, with the beam for applying stress, a word line contact connected to the transistor increases and further to extract characteristics of a plurality of storage node contacts from the received image data, the characteristics being included in the image data, or to receive the characteristics of the plurality of storage node contacts, the characteristics being extracted from the image data; and output reliability information of the transistor by referring to related information with the characteristics of the plurality of storage node contacts, wherein the related information stores the characteristics of the plurality of storage node contacts and the reliability information of the transistor in association with each other.

Assignees

Inventors

Classifications

  • G06T7/001Primary

    using an image reference approach · CPC title

  • Semiconductor; IC; Wafer · CPC title

  • Varying illumination · CPC title

  • Scan or image signal processing specially adapted therefor, e.g. for scan signal adjustment, for detecting different kinds of defects, for compensating for structures, markings, edges (G01N21/8806 and G01N21/93 - G01N21/95692 take precedence; optical measurement of dimensions G01B11/00; optical scanning G02B26/10; image transformation G06T3/00; computerised image enhancement G06T5/00; image processing per se for flaw detection G06T7/0002) · CPC title

  • Specially adapted optical and illumination features · CPC title

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What does patent US2023274417A1 cover?
An object of the present disclosure is to provide a system for deriving a type of defect of a semiconductor element and a non-transitory computer-readable medium. The system receives, from the image acquisition tool, image data obtained by sequentially irradiating a plurality of patterns provided on the semiconductor wafer with a beam and extracts characteristics of the plurality of patterns se…
Who is the assignee on this patent?
Hitachi High Tech Corp
What technology area does this patent fall under?
Primary CPC classification G06T7/001. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Aug 31 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).