Coupon wafer and method of preparation thereof

US2023117282A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2023117282-A1
Application numberUS-202117911111-A
CountryUS
Kind codeA1
Filing dateMar 16, 2021
Priority dateMar 17, 2020
Publication dateApr 20, 2023
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A coupon wafer comprising a device coupon (110) for use in a micro-transfer printing process used to fabricate an optoelectronic device. The coupon wafer includes a wafer substrate (124), and the device coupon (110) is attached to the wafer substrate via a tether (122) and the tether (122) is formed from a dielectric material.

First claim

Opening claim text (preview).

1 . A coupon wafer comprising a device coupon for use in a micro-transfer printing process used to fabricate an optoelectronic device, wherein the coupon wafer includes a wafer substrate, and the device coupon is attached to the wafer substrate via a tether; and wherein the tether comprises a dielectric material. 2 . The coupon wafer of claim 1 , wherein the tether extends across a surface of the device coupon and across a portion of an upper surface of the wafer substrate. 3 . The coupon wafer of claim 1 , wherein the tether is a multi-layered tether. 4 . The coupon wafer of claim 3 , wherein the tether includes a layer of silicon nitride or a layer of silicon oxide. 5 . The coupon wafer of claim 3 , wherein the tether includes: a layer of silicon nitride and a layer of photoresist; a layer of silicon oxide and a layer of photoresist; or a layer of silicon nitride, a layer of silicon oxide, and a layer of photoresist. 6 . The coupon wafer of claim 1 , wherein the tether has a thickness of at least 20 nm and no more than 500 nm. 7 . The coupon wafer of claim 1 , wherein the device coupon includes an anti-reflective coating, and the tether is at least partially provided by the anti-reflective coating. 8 . The coupon wafer of claim 1 , further comprising a sacrificial layer, located between the device coupon and the wafer substrate. 9 . The coupon wafer of claim 8 , wherein the tether extends down a sidewall of the device coupon, across a portion of an upper surface of the sacrificial layer, down a sidewall of the sacrificial layer, and across a portion of an upper surface of the wafer substrate. 10 . The coupon wafer of claim 1 , further comprising a gap, between the device coupon and the wafer substrate. 11 . The coupon wafer of claim 10 , wherein the tether extends down a sidewall of the device coupon, above a portion of an upper surface of the wafer substrate, and down to contact the wafer substrate. 12 . The coupon wafer of claim 1 , wherein the tether comprises a first region which extends down a vertical side of the device coupon towards the wafer substrate, and a second region which extends horizontally away from the device coupon. 13 . The coupon wafer of claim 1 , wherein the coupon wafer comprises a raised platform above which the device coupon is located, wherein the tether extends beyond the raised platform and along a sidewall thereof. 14 . The coupon wafer of claim 1 , the coupon wafer comprising: a channel, being bounded on one side by a surface of the device coupon and on an opposite side by a sidewall of the coupon wafer; and wherein the tether extends across a surface of the device coupon, and across the channel to contact one or more sidewalls of the coupon wafer. 15 . The coupon wafer of claim 14 , wherein a portion of the tether extending across the channel is narrower than an adjacent portion of tether. 16 . The coupon wafer of claim 14 , wherein the channel extends around the entire perimeter of the device coupon. 17 . The coupon wafer of claim 1 , wherein the tether includes one or more apertures therethrough. 18 . A method of preparing a coupon wafer for use in a micro-transfer printing process, the coupon wafer comprising a device coupon used to fabricate an optoelectronic device, wherein the method comprises: depositing a tether across a surface of the device coupon to attach the device coupon to a wafer substrate of the coupon wafer; wherein the tether comprises a dielectric material. 19 . The method of claim 18 , wherein the method further comprises: a filling step, performed before depositing the tether, of at least partially filling a channel with a filling material, the channel being bounded on one side by a surface of the device coupon and on an opposite side by a sidewall of the coupon wafer, and an etching step, performed after depositing the tether, of removing the filling material, leaving a gap between the device coupon and one or more sidewalls of the coupon wafer. 20 . A method of micro-transfer printing, using the coupon wafer of claim 1 , comprising steps of: adhering the device coupon to a stamp, and lifting it away from the coupon wafer; and depositing the device coupon on a platform wafer, thereby forming an optoelectronic device. 21 . An optoelectronic device, formed using the method of claim 20 .

Assignees

Inventors

Classifications

  • used to support diced chips prior to mounting · CPC title

  • leaving a reusable substrate, e.g. epitaxial lift off · CPC title

  • H10P72/74Primary

    using temporarily an auxiliary support · CPC title

  • using batch processing · CPC title

  • batch processes · CPC title

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Frequently asked questions

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What does patent US2023117282A1 cover?
A coupon wafer comprising a device coupon (110) for use in a micro-transfer printing process used to fabricate an optoelectronic device. The coupon wafer includes a wafer substrate (124), and the device coupon (110) is attached to the wafer substrate via a tether (122) and the tether (122) is formed from a dielectric material.
Who is the assignee on this patent?
Rockley Photonics Ltd
What technology area does this patent fall under?
Primary CPC classification H10P72/74. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Apr 20 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).