Electronic package

Patent metadata

Field	Value
Publication number	US-2023097299-A1
Application number	US-202117477238-A
Country	US
Kind code	A1
Filing date	Sep 16, 2021
Priority date	Sep 16, 2021
Publication date	Mar 30, 2023
Grant date	—

Abstract

An electronic package includes a carrier, a protection layer and an electronic component. The carrier includes a dielectric layer and a pad in contact with the dielectric layer. The protection layer at least partially covers the pad. The electronic component is located over the protection layer and electrically connected to the pad. At least one portion of the protection layer under the electronic component is substantially conformal with a profile of the pad or with a profile of the dielectric layer.

First claim

What is claimed is:

1 . An electronic package, comprising:
a carrier including a dielectric layer and a pad in contact with the dielectric layer; a protection layer at least partially covering the pad; and an electronic component located over the protection layer and electrically connected to the pad; wherein at least one portion of the protection layer under the electronic component is substantially conformal with a profile of the pad or with a profile of the dielectric layer.

2 . The electronic package of claim 1 , wherein a first portion of the protection layer under the electronic component is substantially conformal with the profile of the dielectric layer and a second portion of the protection layer under the electronic component is substantially conformal with the profile of the pad.

3 . The electronic package of claim 1 , wherein the pad and the dielectric layer collectively define a step portion, and the at least one portion of the protection layer under the electronic component is substantially conformal with the step portion.

4 . The electronic package of claim 3 , wherein a top surface of the pad is higher than a top surface of the dielectric layer.

5 . The electronic package of claim 4 , wherein the protection layer includes a first portion and a second portion higher than the first portion, and the second portion is closer to an interconnection between the electronic component and the pad than the first portion is.

6 . The electronic package of claim 4 , wherein the protection layer includes a first portion and a second portion higher than the first portion, and an elevation of a top surface of the first portion is lower than an elevation of the top surface of the pad.

7 . The electronic package of claim 4 , wherein a thickness of the protection layer on the top surface of the pad is substantially equal to a thickness of the protection layer on the top surface of the dielectric layer.

8 . The electronic package of claim 7 , wherein the thickness of the protection layer is less than a thickness of the pad.

9 . The electronic package of claim 4 , wherein a distance between the electronic component and the protection layer on the dielectric layer is greater than a distance between the electronic component and the protection layer on the pad.

10 . The electronic package of claim 1 , wherein the protection layer includes an opening exposing a portion of the pad, and a thickness of the protection layer is less than a thickness of the dielectric layer.

11 . An electronic package, comprising:
a carrier including a dielectric layer and a first pad and a second pad adjacent to the dielectric layer; a protection layer covering the first pad, the second pad and the dielectric layer, and defining a recess between the first pad and the second pad; an electronic component located over the recess and electrically connected to the first pad and the second pad by a first interconnection and a second interconnection respectively; and an encapsulant extending between the first interconnection and the second interconnection.

12 . The electronic package of claim 11 , wherein the protection layer is at least partially substantially conformal with a profile of the first pad, a profile of the second pad and a profile of the dielectric layer to define the recess.

13 . The electronic package of claim 11 , wherein the encapsulant extends into the recess.

14 . The electronic package of claim 13 , wherein the encapsulant includes at least one filler in the recess, and a dimension of the at least one filler is less than a gap between the electronic component and the recess of the protection layer.

15 . The electronic package of claim 14 , wherein the at least one filler in the recess is spaced apart from the electronic component or the protection layer.

16 . The electronic package of claim 11 , wherein a portion of the protection layer corresponding to the recess has a uniform thickness.

17 . The electronic package of claim 11 , wherein a thickness of the protection layer is less than a thickness of the first pad.

18 . The electronic package of claim 11 , wherein the protection layer includes an opening exposing a portion of the first pad, the electronic component is electrically connected to the exposed portion of the first pad, and a thickness of the protection layer is less than a thickness of the dielectric layer.

19 . An electronic package, comprising:
a substrate including a dielectric layer; and a protection layer covering the substrate, wherein a hygroscopicity of the protection layer is less than a hygroscopicity of the dielectric layer.

20 . The electronic package of claim 19 , wherein the protection layer includes parylene.

Assignees

• Advanced Semiconductor Eng

Inventors

• Yen You-Lung
• Appelt Bernd Karl

Classifications

• H10W70/687

  characterized by the outer layers being for protection, e.g. solder masks, or for protection against chemical or mechanical damage · CPC title

• H10W74/47

  comprising organic materials, e.g. plastics or resins · CPC title

• H10W70/69

  Insulating materials thereof · CPC title

• H10W70/685

  comprising multiple insulating layers · CPC title

• H10W90/701

  characterised by the relative positions of pads or connectors relative to package parts · CPC title