Method and apparatus to reduce feature charging in plasma processing chamber

Patent metadata

Field	Value
Publication number	US-2022399186-A1
Application number	US-202117352165-A
Country	US
Kind code	A1
Filing date	Jun 18, 2021
Priority date	Jun 9, 2021
Publication date	Dec 15, 2022
Grant date	—

Abstract

Embodiments provided herein include an apparatus and methods for the plasma processing of a substrate in a processing chamber. In some embodiments, aspects of the apparatus and methods are directed to reducing defectivity in features formed on the surface of the substrate, improving plasma etch rate, and increasing selectivity of etching material to mask and/or etching material to stop layer. In some embodiments, the apparatus and methods enable processes that can be used to prevent or reduce the effect of trapped charges, disposed within features formed on a substrate, on the etch rate and defect formation. In some embodiments, the plasma processing methods include the synchronization of the delivery of pulsed-voltage (PV) waveforms, and alternately the delivery of a PV waveform and a radio frequency (RF) waveform, so as to allow for the independent control of generation of electrons that are provided, during one or more stages of a PV waveform cycle, to neutralize the trapped charges formed in the features formed on the substrate.

First claim

1 . A plasma processing system, comprising:
a substrate support assembly, comprising:
a substrate supporting surface;
a bias electrode; and
a first dielectric layer disposed between the bias electrode and the substrate supporting surface;
a first waveform generator coupled to the bias electrode, wherein the first waveform generator is configured to generate a first plurality of pulsed voltage waveforms that are established at the bias electrode, and each of the pulsed voltage waveforms of the first plurality of pulsed voltage waveforms comprise a first stage and a second stage that has a lower voltage level than a voltage level in the first stage; a first electrode disposed over the substrate supporting surface; a second waveform generator coupled to the first electrode, wherein the second waveform generator is configured to generate a second plurality of pulsed voltage waveforms that are established at the first electrode, and each of the pulsed voltage waveforms of the second plurality of pulsed voltage waveforms comprise a first stage and a second stage that has a higher voltage level than a voltage level in the first stage; and a controller comprising a memory that comprises computer implemented instructions, which, when executed by a processor, is configured to synchronize the generation of the first plurality of pulsed voltage waveforms and the second plurality of pulsed voltage waveforms, such that
the first stage of the pulsed waveforms in the first plurality of pulsed voltage waveforms and the first stage of the pulsed waveforms in the second plurality of pulsed voltage waveforms at least partially overlap in time, and
the second stage of the pulsed waveforms in the first plurality of pulsed voltage waveforms and the second stage of the pulsed waveforms in the second plurality of pulsed voltage waveforms at least partially overlap in time.

2 . The plasma processing system of claim 1 , wherein a duration of time of the first stage of the pulsed waveforms in the first plurality of pulsed voltage waveforms and a duration of time of the first stage of the pulsed waveforms in the second plurality of pulsed voltage waveforms are substantially equal.

3 . The plasma processing system of claim 1 , wherein the substrate support assembly further comprises a second electrode that is disposed a distance from a center of the substrate supporting surface and a center of the first electrode.

4 . The plasma processing system of claim 3 , further comprising a second waveform generator coupled to the second electrode, wherein the second waveform generator is configured to generate a third plurality of pulsed voltage waveforms that are established at the second electrode, and each of the pulsed voltage waveforms of the third plurality of pulsed voltage waveforms comprise a first stage and a second stage that has a lower voltage level than a voltage level in the first stage.

5 . The plasma processing system of claim 4 , wherein the computer implemented instructions are further configured to synchronize the generation of the first plurality of pulsed voltage waveforms and the generation of the third plurality of pulsed voltage waveforms.

6 . The plasma processing system of claim 3 , further comprising a second power delivery path to couple the first waveform generator to the second electrode.

7 . The plasma processing system of claim 1 , further comprising a radio frequency (RF) generator electrically coupled to the bias electrode, the first electrode, or a second electrode.

8 . The plasma processing system of claim 1 , wherein the first electrode comprises silicon.

9 . The plasma processing system of claim 1 , wherein the first electrode has a surface that faces the substrate supporting surface, and the surface is substantially parallel to the substrate supporting surface.

10 . The plasma processing system of claim 9 , further comprising a radio frequency (RF) generator electrically coupled to the first electrode.

11 . A plasma processing system, comprising:
a substrate support assembly, comprising:
a substrate supporting surface;
a bias electrode; and
a first dielectric layer disposed between the bias electrode and the substrate supporting surface;
a first waveform generator coupled to the bias electrode, wherein the first waveform generator is configured to generate a first plurality of pulsed voltage waveforms that are established at the bias electrode, and each of the pulsed voltage waveforms of the first plurality of pulsed voltage waveforms comprise a first stage and a second stage; a first electrode disposed over the substrate supporting surface; a second waveform generator coupled to the first electrode, wherein the second waveform generator is configured to generate a second plurality of pulsed voltage waveforms that are established at the first electrode, and each of the pulsed voltage waveforms of the second plurality of pulsed voltage waveforms comprise a first stage and a second stage; and a controller comprising a memory that comprises computer implemented instructions, which, when executed by a processor, is configured to synchronize the generation of the first plurality of pulsed voltage waveforms and the second plurality of pulsed voltage waveforms, such that each of the pulsed waveforms in the first plurality of pulsed voltage waveforms and each of the pulsed waveforms in the second plurality of pulsed voltage waveforms are inversely configured.

12 . The plasma processing system of claim 11 , wherein the substrate support assembly further comprises a second electrode that is disposed a distance from a center of the substrate supporting surface and a center of the first electrode.

13 . The plasma processing system of claim 12 , further comprising a second waveform generator coupled to the second electrode, wherein the second waveform generator is configured to generate a third plurality of pulsed voltage waveforms that are established at the second electrode, and each of the pulsed waveforms in the third plurality of pulsed voltage waveforms and each of the pulsed waveforms in the second plurality of pulsed voltage waveforms are inversely configured.

14 . The plasma processing system of claim 13 , wherein the computer implemented instructions are further configured to synchronize the generation of the first plurality of pulsed voltage waveforms and the generation of the third plurality of pulsed voltage waveforms.

15 . The plasma processing system of claim 11 , further comprising a radio frequency (RF) generator electrically coupled to the bias electrode, the first electrode, or a second electrode.

16 . The plasma processing system of claim 11 , wherein the first electrode comprises silicon.

17 . The plasma processing system of claim 11 , wherein the first electrode has a surface that faces the substrate supporting surface, and the surface is substantially parallel to the substrate supporting surface.

18 . The plasma processing system of claim 17 , further comprising a radio frequency (RF) generator electrically coupled to the first electrode.

Assignees

• Applied Materials Inc

Inventors

• Cui Linying
• Rogers James
• Dhindsa Rajinder
• Ramaswamy Kartik

Classifications

• H10P72/722

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• H10P50/242

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• H01J37/32174 Primary

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• H01J37/3255

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