Back-side deep trench isolation structure for image sensor

US2022384496A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2022384496-A1
Application numberUS-202217883668-A
CountryUS
Kind codeA1
Filing dateAug 9, 2022
Priority dateApr 24, 2020
Publication dateDec 1, 2022
Grant date

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Abstract

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The present disclosure relates to an image sensor having a photodiode surrounded by a back-side deep trench isolation (BDTI) structure, and an associated method of formation. In some embodiments, a plurality of pixel regions is disposed within an image sensing die and respectively comprises a photodiode configured to convert radiation into an electrical signal. The photodiode comprises a photodiode doping column with a first doping type surrounded by a photodiode doping layer with a second doping type that is different than the first doping type. A BDTI structure is disposed between adjacent pixel regions and extending from the back-side of the image sensor die to a position within the photodiode doping layer. The BDTI structure comprises a doped liner with the second doping type and a dielectric fill layer. The doped liner lines a sidewall surface of the dielectric fill layer.

First claim

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What is claimed is: 1 . An image sensor, comprising: a plurality of photodiodes for a plurality of pixel regions disposed from a front-side of an image sensing die, wherein a photodiode has a photodiode doping column with a first doping type surrounded by a photodiode doping layer with a second doping type that is different than the first doping type; a deep trench disposed between adjacent pixel regions in the photodiode doping layer from a back-side of the image sensing die; a doped liner with the second doping type lining a sidewall surface of the deep trench; and a dielectric fill layer disposed along the doped liner and filling an inner space of the deep trench to form a back-side deep trench isolation (BDTI) structure. 2 . The image sensor of claim 1 , wherein the doped liner has a thickness smaller than 10 nm. 3 . The image sensor of claim 1 , wherein the doped liner has a delta doping of boron having a surface doping concentration greater than around 10 20 cm −3 . 4 . The image sensor of claim 1 , wherein the BDTI structure has a bowing angle in a range of about 8° to 15° from an upper sidewall of the BDTI structure to a vertical line perpendicular to a lateral plane of the photodiode doping layer. 5 . The image sensor of claim 1 , wherein the BDTI structure has a a bowing width around 10 nm as a lateral distance from a bowing tip to a body of the BDTI structure. 6 . The image sensor of claim 1 , wherein the BDTI structure is disposed through the photodiode doping layer. 7 . The image sensor of claim 1 , wherein the doped liner reaches on a surface of the photodiode doping column. 8 . The image sensor of claim 1 , wherein the doped liner is formed by an epitaxial deposition process of a doped liner precursor having a thickness of around 1.3 nm with a boron concentration around 1×10 19 cm −3 . 9 . The image sensor of claim 1 , wherein the doped liner is formed by an epitaxial deposition process of a doped liner precursor having a thickness of in a range between approximately 0.5 nm and approximately 3 nm. 10 . The image sensor of claim 1 , wherein the doped liner is formed by an epitaxial deposition process of a doped liner precursor having a dopant concentration in a range between approximately 5×10 19 atoms/cm 3 to approximately 2×10 20 atoms/cm 3 . 11 . An image sensor, comprising: a plurality of photodiodes for a plurality of pixel regions disposed from a front-side of an image sensing die, wherein a photodiode has a photodiode doping column with a first doping type surrounded by a photodiode doping layer with a second doping type that is different than the first doping type; a doped isolation well disposed from the front-side of the image sensing die into the photodiode doping layer; a gate structure and a metallization stack disposed on the front-side of the image sensing die, wherein the metallization stack comprises a plurality of metal interconnect layers arranged within one or more inter-level dielectric layers; a deep trench disposed between adjacent pixel regions in a back-side of the image sensing die; a doped liner with the second doping type lining a sidewall surface of the deep trench; and a dielectric fill layer filling an inner space of the deep trench to form a back-side deep trench isolation (BDTI) structure. 12 . The image sensor of claim 11 , further comprising: a logic die bonded to the image sensing die from the front-side of the image sensing die, wherein the logic die comprises logic devices. 13 . The image sensor of claim 11 , further comprising: a shallow trench isolation (STI) structure disposed between the adjacent pixel regions from the front-side of the image sensing die to a position within the photodiode doping layer. 14 . The image sensor of claim 13 , wherein the doped liner is direct contact with the STI structure. 15 . The image sensor of claim 11 , wherein the doped liner is direct contact with the doped isolation well. 16 . An image sensor, comprising: an image sensing die having a front-side and a back-side opposite to the front-side; a plurality of pixel regions disposed within the image sensing die and respectively comprising a photodiode configured to convert radiation that enters from the back-side of the image sensor die into an electrical signal, the photodiode comprising a photodiode doping column with a first doping type surrounded by a photodiode doping layer with a second doping type that is different than the first doping type; and a back-side deep trench isolation (BDTI) structure disposed between adjacent pixel regions and extending from the back-side of the image sensor die to a position within the photodiode doping layer; and wherein the BDTI structure comprises a doped liner with the second doping type and a dielectric fill layer, the doped liner lining a sidewall surface of the dielectric fill layer. 17 . The image sensor of claim 16 , wherein the doped liner and the dielectric fill layer of the BDTI structure extend laterally along the back-side of the image sensing die; wherein a lateral portion of the doped liner is disposed on the photodiode doping column; and wherein the doped liner has a thickness of 1-20 nm with a boron concentration in a range between approximately 5×10 19 atoms/cm 3 to approximately 2×10 20 atoms/cm 3 . 18 . The image sensor of claim 16 , further comprising: a doped isolation well with the second doping type disposed between the adjacent pixel regions and extending from the front-side of the image sensing die to a position within the photodiode doping layer; and wherein the doped isolation well is separated from the BDTI structure by the photodiode doping layer. 19 . The image sensor of claim 16 , further comprising: a shallow trench isolation (STI) structure disposed between the adjacent pixel regions from the front-side of the image sensing die to a position within the photodiode doping layer; and wherein the BDTI structure extends through the STI structure. 20 . The image sensor of claim 16 , wherein a bowing tip at a top corner of the BDTI structure has a bowing angle in a range of about 8° to 15° from an upper sidewall of the BDTI structure to a vertical line perpendicular to a lateral plane of the photodiode doping layer.

Assignees

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Classifications

  • Electricity · mapped topic

  • Electricity · mapped topic

  • Electricity · mapped topic

  • Electricity · mapped topic

  • H10F39/18Primary

    Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors · CPC title

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What does patent US2022384496A1 cover?
The present disclosure relates to an image sensor having a photodiode surrounded by a back-side deep trench isolation (BDTI) structure, and an associated method of formation. In some embodiments, a plurality of pixel regions is disposed within an image sensing die and respectively comprises a photodiode configured to convert radiation into an electrical signal. The photodiode comprises a photod…
Who is the assignee on this patent?
Taiwan Semiconductor Mfg Co Ltd
What technology area does this patent fall under?
Primary CPC classification H01L27/1463. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Dec 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).