Diffusion Barrier for Semiconductor Device and Method

US2022367376A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2022367376-A1
Application numberUS-202217815026-A
CountryUS
Kind codeA1
Filing dateJul 26, 2022
Priority dateJun 11, 2020
Publication dateNov 17, 2022
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method includes forming an insulating layer over a conductive feature; etching the insulating layer to expose a first surface of the conductive feature; covering the first surface of the conductive feature with a sacrificial material, wherein the sidewalls of the insulating layer are free of the sacrificial material; covering the sidewalls of the insulating layer with a barrier material, wherein the first surface of the conductive feature is free of the barrier material, wherein the barrier material includes tantalum nitride (TaN) doped with a transition metal; removing the sacrificial material; and covering the barrier material and the first surface of the conductive feature with a conductive material.

First claim

Opening claim text (preview).

What is claimed is: 1 . A structure comprising: a first conductive feature in a first dielectric layer; an etch stop layer over the first conductive feature; a second dielectric layer over the etch stop layer; and a second conductive feature extending through the second dielectric layer and the etch stop layer to physically contact the first conductive feature, wherein the second conductive feature comprises: a barrier layer extending continuously on sidewalls of the second dielectric layer and on sidewalls of the etch stop layer, wherein the barrier layer comprises a layer of a transition metal between a first layer of a metal nitride and a second layer of the metal nitride, wherein the metal nitride is free of the transition metal; and a conductive filling material over the barrier layer, wherein the conductive filling material extends between the barrier layer and the first conductive feature. 2 . The structure of claim 1 , wherein the barrier layer partially covers a sidewall of the etch stop layer. 3 . The structure of claim 1 , wherein the conductive filling material physically contacts sidewalls of the etch stop layer. 4 . The structure of claim 1 , wherein the transition metal is ruthenium. 5 . The structure of claim 1 , wherein the layer of the transition metal has a thickness in the range between 1 Å and 6 Å. 6 . The structure of claim 1 , wherein a bottom of the barrier layer is vertically separated from a top of the first conductive feature. 7 . The structure of claim 1 , wherein the metal nitride is tantalum nitride. 8 . The structure of claim 1 , wherein the second conductive feature comprises a lower portion and an upper portion, wherein the lower portion has a smaller width than the upper portion. 9 . A device comprising: a first conductive feature over a substrate; a first insulating layer over the first conductive feature; and a via on the first conductive feature and within the first insulating layer, wherein the via comprises: a conductive material; and a barrier layer between the conductive material and the first insulating layer, wherein the barrier layer comprises a layer of a nitride of a first transition metal, wherein the barrier layer is doped throughout by a second transition metal different from the first transition metal. 10 . The device of claim 9 , further comprising an etch stop layer between the first conductive feature and the first insulating layer. 11 . The device of claim 10 , wherein the barrier layer physically contacts the etch stop layer. 12 . The device of claim 9 , wherein the first conductive feature is free of the barrier layer. 13 . The device of claim 9 , wherein the first transition metal is tantalum. 14 . The device of claim 9 , wherein the second transition metal is cobalt. 15 . The device of claim 9 , wherein the second transition metal is ruthenium. 16 . The device of claim 9 , wherein the doping concentration of the second transition metal is between 5% atomic percent and 30% atomic percent. 17 . A device comprising: a first conductive feature in a first dielectric layer; an etch stop layer over the first conductive feature; a second dielectric layer over the etch stop layer; and a second conductive feature in the second dielectric layer, the second conductive feature comprising: a first layer of a metal nitride; a first layer of a transition metal on the first layer of the metal nitride, wherein the transition metal is a different metal than the metal of the metal nitride; a second layer of the metal nitride on the first layer of the transition metal; and a conductive filling material over the second layer of the metal nitride, wherein the conductive filling material physically contacts the first conductive feature. 18 . The device of claim 17 further comprising a second layer of the transition metal on the second later of the metal nitride. 19 . The device of claim 18 , wherein the first layer of the transition metal has a different thickness than the second layer of the transition metal. 20 . The device of claim 17 , wherein the first layer of the transition metal has a thickness in the range of 10 Å to 60 Å.

Assignees

Inventors

Classifications

  • Nitrides · CPC title

  • using chemical vapour deposition [CVD] · CPC title

  • Cross-sectional shapes or dispositions of interconnections · CPC title

  • in via holes or trenches · CPC title

  • Vias, e.g. via plugs · CPC title

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Frequently asked questions

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What does patent US2022367376A1 cover?
A method includes forming an insulating layer over a conductive feature; etching the insulating layer to expose a first surface of the conductive feature; covering the first surface of the conductive feature with a sacrificial material, wherein the sidewalls of the insulating layer are free of the sacrificial material; covering the sidewalls of the insulating layer with a barrier material, wher…
Who is the assignee on this patent?
Taiwan Semiconductor Mfg Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W20/033. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Nov 17 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).