Film stack simplification for high aspect ratio patterning and vertical scaling

Patent metadata

Field	Value
Publication number	US-2022051938-A1
Application number	US-201917250835-A
Country	US
Kind code	A1
Filing date	Sep 10, 2019
Priority date	Sep 10, 2018
Publication date	Feb 17, 2022
Grant date	—

Abstract

Methods for forming patterned multi-layer stacks including a metal-containing layer are provided herein. Methods involve using silicon-containing non-metal materials in a multi-layer stack including one sacrificial layer to be later removed and replaced with metal while maintaining etch contrast to pattern the multi-layer stack and selectively remove the sacrificial layer prior to depositing metal. Methods involve using silicon oxycarbide in lieu of silicon nitride, and a sacrificial non-metal material in lieu of a metal-containing layer, to fabricate the multi-layer stack, pattern the multi-layer stack, selectively remove the sacrificial non-metal material to leave spaces in the stack, and deposit metal-containing material into the spaces. Sacrificial non-metal materials include silicon nitride and doped polysilicon, such as boron-doped silicon.

First claim

What is claimed is:

1 . A method comprising:
providing a semiconductor substrate; depositing a metal-free multi-layer stack having at least three different materials, at least one of the three different materials being a sacrificial layer; etching a trench or via in the metal-free multi-layer stack having the at least three different materials; after etching the trench or via, selectively etching the sacrificial layer relative to other materials of the metal-free multi-layer stack to form at least one space between layers of the metal-free multi-layer stack; and depositing metal in the at least one space to form a metal-containing multi-layer stack having a trench or via etched therein.

2 . The method of claim 1 , wherein the metal-free multi-layer stack includes three different materials.

3 . The method of claim 1 , wherein the metal-free multi-layer stack includes four different materials.

4 . The method of claim 1 , further comprising after etching the trench or via and prior to selectively etching the sacrificial layer, recessing a dielectric material in sidewalls of the trench or via in the metal-free multi-layer stack.

5 . The method of claim 1 , wherein the sacrificial layer is selected from the group consisting of polysilicon and silicon nitride.

6 . The method of claim 1 , wherein the at least three different materials comprise materials selected from the group consisting of silicon oxide, undoped polysilicon, doped polysilicon, silicon nitride, oxygen-doped silicon carbide, and nitrogen-doped silicon carbide.

7 . The method of claim 1 , wherein layers of the metal-free multi-layer stack are deposited by a technique selected from the group consisting of atomic layer deposition, chemical vapor deposition, plasma-enhanced chemical vapor deposition, and physical vapor deposition.

8 . The method of claim 1 , wherein layers of the metal-free multi-layer stack are deposited in different chambers of a single tool.

9 . The method of claim 1 , wherein layers of the metal-free multi-layer stack are deposited without breaking vacuum.

10 . The method of claim 1 , further comprising:
recessing one of the at least three different materials after etching the trench or via to form a recessed region of the via; depositing a dielectric or semiconductor material into the trench or via; etching back the dielectric or semiconductor material in the trench or via to form smooth sidewalls, leaving the dielectric material in the recessed region; and prior to selectively etching the sacrificial silicon nitride, depositing a gate material into the trench or via.

Assignees

• Lam Res Corp

Inventors

• Wu Hui-Jung
• Van Schravendijk Bart J
• Kawaguchi Mark Naoshi
• Gunawan Gereng
• Uglow Jay E
• Shankar Nagraj
• Kamarthy Gowri Channa
• Mclaughlin Kevin M
• Banerji Ananda K
• Yang Jialing
• Hoang John
• Routzahn Aaron Lynn
• MUSSELWHITE Nathan
• Shen Meihua
• Lill Thorsten Bernd
• Chi Hao
• Altieri Nicholas Dominic

Classifications

• H10P50/282

  of inorganic materials · CPC title

• H10P14/69433

  the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz · CPC title

• H10P14/6328

  Deposition from the gas or vapour phase · CPC title

• H10W20/089

  using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning · CPC title

• H10W20/01

  Manufacture or treatment · CPC title