Systems, methods, and devices for electromagnetic modulation
US-2025239972-A1 · Jul 24, 2025 · US
US2022014218A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2022014218-A1 |
| Application number | US-202117361207-A |
| Country | US |
| Kind code | A1 |
| Filing date | Jun 28, 2021 |
| Priority date | Jul 9, 2020 |
| Publication date | Jan 13, 2022 |
| Grant date | — |
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A communication device according to an embodiment includes an oscillator, a first signal generation circuit, a first insulation element, a first receiving circuit, and a first output circuit. The oscillator is configured to output a first carrier signal when at least one of a plurality of input signals that are externally input is at a first logic level. The first carrier signal and a first input signal among the input signals are input to the first signal generation circuit. The first signal generation circuit is configured to generate a first signal when the first input signal changes from a second logic level to the first logic level, output a first modulated signal based on the first signal, and thereafter output a second modulated signal based on the first carrier signal.
Opening claim text (preview).
What is claimed is: 1 . A communication device comprising: an oscillator configured to output a first carrier signal when at least one of a plurality of input signals that are externally input is at a first logic level; a first signal generation circuit to which the first carrier signal and a first input signal among the input signals are input, wherein the first signal generation circuit is configured to generate a first signal when the first input signal changes from a second logic level to the first logic level, output a first modulated signal based on the first signal, and thereafter output a second modulated signal based on the first carrier signal, and output a second logic level signal when the first input signal changes from the first logic level to the second logic level; a first insulation element coupled to an output of the first signal generation circuit; a first receiving circuit configured to perform signal reception via the first insulation element and signal demodulation, based on the output of the first signal generation circuit; and a first output circuit configured to externally output the signal demodulated by the first receiving circuit. 2 . The device of claim 1 , wherein the first signal is a single pulse signal. 3 . The device of claim 1 , wherein the first modulated signal is continuous to the second modulated signal. 4 . The device of claim 1 , wherein the first signal generation circuit outputs a differential signal. 5 . The device of claim 1 , further comprising: a second signal generation circuit to which a second input signal among the input signals and a second carrier signal output by the oscillator are input, wherein the second signal generation circuit is configured to generate a second signal when the second input signal changes from the second logic level to the first logic level, output a third modulated signal based on the second signal, and thereafter output a fourth modulated signal based on the second carrier signal; output a second logic level signal when the second input signal changes from the first logic level to the second logic level; a second insulation element coupled to an output of the second signal generation circuit; a second receiving circuit configured to perform signal reception via the second insulation element and signal demodulation, based on the output of the second signal generation circuit; and a second output circuit configured to externally output the signal demodulated by the second receiving circuit. 6 . The device of claim 5 , wherein the first carrier signal and the second carrier signal each have a different phase. 7 . The device of claim 1 , wherein upon detection of a change of the first input signal from the second logic level to the first logic level when the first carrier signal that is being output by the oscillator is at the second logic level, the first signal generation circuit outputs the first modulated signal, and thereafter outputs the second modulated signal in phase with the first carrier signal. 8 . The device of claim 1 , wherein upon detection of a change of the first input signal from the second logic level to the first logic level when the first carrier signal that being output by the oscillator is at the first logic level, the first signal generation circuit outputs the first modulated signal, and thereafter outputs the second modulated signal by inverting a phase of the second modulated signal. 9 . The device of claim 1 , wherein the first signal generation circuit generates the first signal based on a delayed signal generated by delaying the first input signal. 10 . A communication device comprising: an oscillator configured to output a carrier signal when at least one of an externally input first input signal and second input signal is at a first logic level; a first signal generation circuit comprising a first signal generation unit and a first drive circuit, wherein the first signal generation unit is configured to generate a first pulse when detecting a rising edge of the first input signal, output a signal based on and in phase with the carrier signal as a signal including a second and subsequent pulses if the carrier signal is at a second logic level, which differs from the first logic level, at time of detecting the rising edge of the first input signal, and output a signal based on the carrier signal and having a phase inverted from a phase of the carrier signal as a signal including a second and subsequent pulses if the carrier signal is at the first logic level at the time of detecting the rising edge of the first input signal, and the first drive circuit is configured to amplify an output signal of the first signal generation unit; a second signal generation circuit comprising a second signal generation unit and a second drive circuit, wherein the second signal generation unit is configured to generate a second pulse when detecting a rising edge of the second input signal, output a signal based on and in phase with the carrier signal as a signal including a second and subsequent pulses if the carrier signal is at the second logic level at time of detecting the rising edge of the second input signal, and output a signal based on the carrier signal and having a phase inverted from the phase of the carrier signal as a signal including a second and subsequent pulses if the carrier signal is at the first logic level at the time of detecting the rising edge of the second input signal, and a second drive circuit is configured to amplify an output signal of the second signal generation unit; a first insulation element coupled to an output of the first drive circuit; a second insulation element coupled to an output of the second drive circuit; a first output circuit configured to receive a signal based on the output signal of the first drive circuit via the first insulation element and externally output a signal based on the received signal; and a second output circuit configured to receive a signal based on the output signal of the second drive circuit via the second insulation element and externally output a signal based on the received signal. 11 . The device of claim 10 , wherein the first signal generation unit comprises: a clock transition detection circuit to which the first input signal and the carrier signal are input, the clock transition detection circuit being configured to generate a first control signal and a second control signal based on the input first input signal and carrier signal; a pulse generation circuit configured to generate a first signal based on the first delayed input signal, the first control signal and the second control signal; a phase detection circuit configured to generate a third control signal and a fourth control signal based on the first control signal and the second control signal; a selector circuit configured to generate an internal carrier signal based on the third control signal, the fourth control signal and a second delayed carrier signal; and a first OR circuit configured to execute an OR operation upon the first signal and the internal carrier signal, wherein a result of the OR operation is amplified and output by the first drive circuit, the clock transition detection circuit is configured to transition the first control signal from the second logic level to the first logic level when detecting a rising edge of the carrier signal after the first input signal rises, and to transition the second control signal from the second logic level to the first logic level when detecting a falling edge of the carrier signal, the pulse generation circuit is configured to transition the first signal f
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