Solid-state imaging device and electronic apparatus

Patent metadata

Field	Value
Publication number	US-2021400225-A1
Application number	US-201917419124-A
Country	US
Kind code	A1
Filing date	Dec 2, 2019
Priority date	Dec 27, 2018
Publication date	Dec 23, 2021
Grant date	—

Abstract

A solid-state imaging device according to an embodiment of the present disclosure includes two or more pixels. The pixels each include a photoelectric converter, a charge holding section, and a transfer transistor. The charge holding section holds electric charge transferred from the photoelectric converter. The transfer transistor transfers electric charge from the photoelectric converter to the charge holding section. The pixels each further include a light blocking section that is disposed in a layer between the photoelectric converter and the charge holding section. The light blocking section has an opening which a vertical gate runs through. The pixels each further include a charge blocking section that blocks transfer of electric charge to the transfer transistor via a region between an edge, of the opening, closer to the charge holding section and the vertical gate.

First claim

1 . A solid-state imaging device comprising:
a light receiving surface; and two or more pixels that oppose the light receiving surface, wherein the pixels each include
a photoelectric converter that performs photoelectric conversion on light entering via the light receiving surface,
a charge holding section that holds electric charge transferred from the photoelectric converter,
a transfer transistor that includes a vertical gate electrode reaching the photoelectric converter, and transfers electric charge from the photoelectric converter to the charge holding section,
a light blocking section that is disposed in a layer between the photoelectric converter and the charge holding section and has an opening which the vertical gate runs through, the light blocking section blocking entry, into the charge holding section, of light entering via the light receiving surface at a part other than the opening, and
a charge blocking section that blocks transfer of electric charge to the transfer transistor via a region between an edge, of the opening, closer to the charge holding section and the vertical gate.

2 . The solid-state imaging device according to claim 1 , wherein the charge blocking section isolates the light blocking section and the vertical gate from each other.

3 . The solid-state imaging device according to claim 1 , wherein the light blocking section and the vertical gate are both provided in contact with the charge blocking section.

4 . The solid-state imaging device according to claim 2 , wherein the charge blocking section includes a single-layer film including a silicon oxide or a multilayer film including a silicon oxide film.

5 . The solid-state imaging device according to claim 1 , wherein the vertical gate includes a wall that blocks entry, into the charge holding section, of light entering via the light receiving surface.

6 . The solid-state imaging device according to claim 1 , further comprising a separator that is joined to each of the light blocking sections, the separator electrically and optically separating the pixels from each other.

7 . The solid-state imaging device according to claim 6 , further comprising
a semiconductor substrate that includes the light receiving surface and a formation surface for the transfer transistor, and on which each of the pixels is provided, wherein the separator is provided to extend from the light receiving surface to the formation surface.

8 . An electronic apparatus comprising:
a solid-state imaging device that outputs a pixel signal based on entering light; and a signal processing circuit that processes the pixel signal, wherein the solid-state imaging device includes
a light receiving surface, and
two or more pixels that oppose the light receiving surface, and the pixels each include
a photoelectric converter that performs photoelectric conversion on light entering via the light receiving surface,
a charge holding section that holds electric charge transferred from the photoelectric converter,
a transfer transistor that includes a vertical gate electrode reaching the photoelectric converter, and transfers electric charge from the photoelectric converter to the charge holding section,
a light blocking section that is disposed in a layer between the photoelectric converter and the charge holding section and has an opening which the vertical gate runs through, the light blocking section blocking entry, into the charge holding section, of light entering via the light receiving surface at a part other than the opening, and
a charge blocking section that blocks transfer of electric charge to the transfer transistor via a region between an edge, of the opening, closer to the charge holding section and the vertical gate.

Assignees

• Sony Semiconductor Solutions Corp

Inventors

• Manda Shuji
• Okuyama Atsushi
• Hirano Tomoyuki

Classifications

• H04N25/77 Primary

  Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components · CPC title

• H04N25/68

  applied to defects · CPC title

• H10F39/8037

  the integrated elements comprising a transistor · CPC title

• H10F39/014

  of CMOS image sensors · CPC title

• H10F39/199

  Back-illuminated image sensors · CPC title