Glassy carbon mask for immersion implant and selective laser anneal

Patent metadata

Field	Value
Publication number	US-2021384405-A1
Application number	US-202016895997-A
Country	US
Kind code	A1
Filing date	Jun 8, 2020
Priority date	Jun 8, 2020
Publication date	Dec 9, 2021
Grant date	—

Abstract

According to an embodiment of the present invention, a method of producing a computing device includes providing a semiconductor substrate, and patterning a mask on the semiconductor substrate, the mask exposing a first portion of the semiconductor substrate and covering a second portion of the semiconductor substrate. The method includes implanting the first portion of the semiconductor substrate with a dopant. The method includes annealing the first portion of the semiconductor substrate to form an annealed doped region, while maintaining the second portion of the semiconductor substrate as an unannealed portion.

First claim

What is claimed is:

1 . A method of producing a computing device, comprising:
providing a semiconductor substrate; patterning a mask on said semiconductor substrate, said mask exposing a first portion of said semiconductor substrate and covering a second portion of said semiconductor substrate; implanting said first portion of said semiconductor substrate with a dopant; and annealing said first portion of said semiconductor substrate to form an annealed doped region, while maintaining said second portion of said semiconductor substrate as an unannealed portion.

2 . The method of producing a computing device according to claim 1 , wherein patterning said mask on said semiconductor substrate comprises:
depositing a layer of mask material on said semiconductor substrate; and removing a portion of said layer of mask material to pattern said mask.

3 . The method of producing a computing device according to claim 1 , wherein said mask comprises glassy carbon.

4 . The method of producing a computing device according to claim 1 , wherein said semiconductor substrate comprises Si.

5 . The method of producing a computing device according to claim 1 , wherein said annealed doped region comprises superconducting Si.

6 . The method of producing a computing device according to claim 5 , wherein said superconducting Si comprises Si implanted with B.

7 . The method of producing a computing device according to claim 1 , wherein said annealed doped region has a crystalline structure.

8 . The method of producing a computing device according to claim 1 , wherein annealing said first portion comprises laser annealing said first portion.

9 . The method of producing a computing device according to claim 8 , wherein said mask absorbs a frequency of a laser used for said laser annealing.

10 . The method of producing a computing device according to claim 1 , wherein said mask is physically stable at 900° C.

11 . The method of producing a computing device according to claim 8 , wherein said mask shrinks less than 10% at 900° C.

12 . The method of producing a computing device according to claim 1 , further comprising, prior to forming said mask on said semiconductor substrate, forming a region of thermally-sensitive material on said semiconductor substrate,
wherein patterning said mask comprises covering said region of thermally-sensitive material with said mask.

13 . A computing device produced according to the method of claim 1 .

14 . A computing device, comprising:
a semiconductor substrate, comprising:
an annealed doped region formed in said semiconductor substrate; and
a non-superconducting region in said semiconductor substrate proximal to said annealed doped region,
wherein said annealed doped region has a dopant that is implanted by annealing, and wherein said non-superconducting region has a structure that is unaltered by annealing.

15 . The computing device according to claim 14 , wherein said semiconductor substrate comprises Si.

16 . The computing device according to claim 14 , wherein said annealed doped region comprises superconducting Si.

17 . The computing device according to claim 16 , wherein said superconducting Si comprises Si implanted with B.

18 . The computing device according to claim 14 , wherein said annealed doped region has a crystalline structure.

19 . The computing device according to claim 14 , wherein said non-superconducting region has a crystalline structure.

20 . The computing device according to claim 14 , further comprising a structure comprising heat-sensitive material formed on a surface of said non-superconducting region.

Assignees

• IBM

Inventors

• Holmes Steven J
• Sadana Devendra K
• Wacaser Brent A
• Farmer Damon Brooks

Classifications

• H01L39/12

  Electricity · mapped topic

• H01L39/24 Primary

  Electricity · mapped topic

• H10N60/85 Primary

  Superconducting active materials · CPC title

• H10N60/01 Primary

  Manufacture or treatment · CPC title