Semiconductor device and production method thereof

US2021335700A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2021335700-A1
Application numberUS-202117370770-A
CountryUS
Kind codeA1
Filing dateJul 8, 2021
Priority dateJan 10, 2019
Publication dateOct 28, 2021
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device includes a semiconductor package equipped with a plurality of electrodes and a mount member which is equipped with a plurality of lands and on which the semiconductor package is mounted. The semiconductor package has the electrodes joined to the lands through solders. One of the electrodes is designed as a position/orientation control electrode for the semiconductor package. One of the lands is designed as a position/orientation control land for the semiconductor package. The position/orientation control land is arranged inside the position/orientation control electrode in a planar view thereof and includes a plurality of first extensions which extend in different radial directions about the center of the semiconductor package. The position/orientation control electrode includes a plurality of second extensions which extend along the first extensions. Each of the first extension has an outer portion which is located outside an outer line of a facing one of the second extensions. The outer portions are arranged to be symmetrical with respect to the center of the semiconductor package.

First claim

Opening claim text (preview).

1 . A semiconductor device comprising: a semiconductor package which is equipped with a plurality of electrodes; and a mount member which is equipped with a plurality of lands and on which the semiconductor package is mounted, wherein the semiconductor package has the electrodes joined to the lands through solders, at least two of the electrodes work as position/orientation control electrodes to control a position and orientation of the semiconductor package relative to a mount surface that is a surface of the mount member which faces the semiconductor package, at least two of the lands work as position/orientation control lands to control the position and orientation of the semiconductor package relative to the mount surface of the mount member, each of the position/orientation control electrodes is arranged in a planar view thereof to have a center thereof offset from a center of a respective one of the position/orientation control lands which is joined to the position/orientation control electrode through the solder, each of the position/orientation control electrodes lying inside an outline of a corresponding one of the position/orientation control lands the number of position/orientation control lands and the number of position/orientation control electrodes are plural, and each of the position/orientation control electrodes is exposed outside only a lower surface of the semiconductor package which faces the mount member, each of the position/orientation control lands is arranged in a planar view thereof in a region located inside an outline of the semiconductor package, if a direction from the center of each of the position/orientation control electrodes to the center of a corresponding one of the position/orientation control lands is defined as an offset direction in a planar view thereof, a spread of each of the position/orientation control lands relative to a corresponding one of the position/orientation control electrodes becomes larger in the offset direction than in a direction opposite the offset direction, each of the position/orientation control lands and one of the position/orientation control lands which are joined together through one of the solders are defined as a position/orientation control pair, the position/orientation control pairs being arranged to be symmetrical with respect to a center of the semiconductor package in a planar view thereof. 2 . The semiconductor device as set forth in claim 1 , wherein the position/orientation control pairs are arranged to be point-symmetrical or line-symmetrical with each other. 3 . The semiconductor device as set forth in claim 1 , wherein the position/orientation control electrodes are arranged to have portions of outlines thereof which are at least located far away in the direction opposite the offset direction and coincide with outlines of the position/orientation control lands joined to the position/orientation control electrodes through the solders in a planar view thereof. 4 . The semiconductor device as set forth in claim 1 , wherein the position/orientation control electrodes are designed as auxiliary electrodes which are different from signal electrodes, as included in the electrodes, to which signals outputted from the semiconductor package are transmitted, and of the lands, the position/orientation control lands are designed as auxiliary lands which are different from signal lands to which the signals are transmitted. 5 . The semiconductor device as set forth in claim 1 , wherein the position/orientation control electrodes are designed as signal electrodes to which signals outputted from the semiconductor package are transmitted, and the position/orientation control lands are designed as signal lands to which the signals are transmitted. 6 . The semiconductor device as set forth in claim 1 , wherein each of the position/orientation control lands is arranged to have a center thereof which is located closer to a center among the position/orientation control electrodes than a center of a corresponding one of the position/orientation control electrodes is in a planar view thereof. 7 . The semiconductor device as set forth in claim 1 , wherein each of the position/orientation control lands is arranged to have a center thereof which is located farther away from a center among the position/orientation control electrodes than from a center of a corresponding one of the position/orientation control electrodes in a planar view thereof. 8 . A semiconductor device comprising: a semiconductor package which is equipped with a plurality of electrodes; and a mount member which is equipped with a plurality of lands and on which the semiconductor package is mounted, wherein the semiconductor package has the electrodes joined to the lands through solders, one of the electrodes works as a position/orientation control electrode to control a position and orientation of the semiconductor package relative to a mount surface that is a surface of the mount member which faces the semiconductor package, one of the lands works as a position/orientation control land to control the position and orientation of the semiconductor package relative to the mount surface of the mount member, the position/orientation control land is larger in planar size than the position/orientation control electrode and occupies the position/orientation control electrode inside the position/orientation control land in a planar view, the position/orientation control land including a plurality of extensions extending in a radial direction from a center of the semiconductor package, the plurality of extensions extend in directions different from each other, the extensions of the position/orientation control land are defined as first extensions, the position/orientation control electrode includes a plurality of second extensions which extend along the first extensions, each of the first extensions has an outer portion arranged outside an outline of one of the second extensions each of the first extensions faces, the outer portions being arranged to be symmetrical with respect to a center of the semiconductor package, and a spread of the position/orientation control land relative to the position/orientation control electrode is larger in size on the outer portions than on other portions of the position/orientation control land. 9 . The semiconductor device as set forth in claim 1 , wherein the semiconductor package is equipped with a sensor working to output a signal as a function of a physical quantity when exerted thereon. 10 . A production method for producing a semiconductor device in which a semiconductor package equipped with a plurality of electrodes is joined using solders to a mount member equipped with a plurality of lands, comprising: preparing the semiconductor package; preparing the mount member; applying the solders to the lands of the mount member; and mounting the semiconductor package on the mount member to which the solders are applied, wherein in preparation of the semiconductor package, at least two of the electrodes are provided as position/orientation control electrodes to control a position and orientation of the semiconductor package relative to a mount surface that is a surface of the mount member facing the semiconductor package, in preparation of the mount member, at least two of the lands are provided as position/orientation control lands to control the position and orientation of the semiconductor package relative to the mount surface of the mount member, the position/orientation control lands being larger in planar size than the position/orientation control electrodes, in application of the solders, a given portion of each of the position/or

Assignees

Inventors

Classifications

  • Soldering or alloying · CPC title

  • characterised by the relative positions of pads or connectors relative to package parts · CPC title

  • Connecting or disconnecting · CPC title

  • H10W70/65Primary

    Shapes or dispositions of interconnections · CPC title

  • Manufacturing or production processes characterised by the final manufactured product · CPC title

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Frequently asked questions

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What does patent US2021335700A1 cover?
A semiconductor device includes a semiconductor package equipped with a plurality of electrodes and a mount member which is equipped with a plurality of lands and on which the semiconductor package is mounted. The semiconductor package has the electrodes joined to the lands through solders. One of the electrodes is designed as a position/orientation control electrode for the semiconductor packa…
Who is the assignee on this patent?
Denso Corp
What technology area does this patent fall under?
Primary CPC classification H10W70/65. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Oct 28 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).