Electron excitation atomic layer etch

Patent metadata

Field	Value
Publication number	US-2021280433-A1
Application number	US-201917250326-A
Country	US
Kind code	A1
Filing date	Jul 3, 2019
Priority date	Jul 9, 2018
Publication date	Sep 9, 2021
Grant date	—

Abstract

Disclosed are apparatuses and methods for performing atomic layer etching. A method may include modifying one or more surface layers of material on the substrate and exposing the one or more modified surface layers on the substrate to an electron source thereby removing, without using a plasma, the one or more modified surface layers on the substrate. An apparatus may include a processing chamber, a process gas unit, an electron source, and a controller with instructions configured to cause the process gas unit to flow a first process gas to a substrate in a chamber interior, the first process gas is configured to modify one or more layers of material on the substrate, and to cause the electron source to generate electrons and expose the one or more modified surface layers on the substrate to the electrons, the one or more modified surface layers being removed, without using a plasma.

First claim

1 . A method of processing a substrate, the method comprising:
modifying one or more surface layers of material on the substrate; and exposing the one or more modified surface layers on the substrate to an electron source thereby removing, without using a plasma, the one or more modified surface layers on the substrate.

2 . The method of claim 1 , wherein the exposing further comprises simultaneously exposing all of the one or more modified surface layers on the substrate to the electron source.

3 . The method of claim 1 , wherein the exposing further comprises exposing a first section of the one or more modified surface layers to the electron source.

4 . The method of claim 3 , wherein only the first section of the one or more modified surface layers is exposed to the electron source while a second section of the one or more modified surface layers is not exposed to the electron source.

5 . The method of claim 3 , wherein the exposing further comprises exposing a second section of the one or more modified surface layers to the electron source after the exposing of the first section.

6 . The method of claim 5 , wherein the exposing further comprises:
exposing the first section of the one or more modified surface layers to the electron source at a first beam energy level, and exposing the second section of the one or more modified surface layers to the electron source at a second beam energy level.

7 . The method of claim 5 , wherein the exposing further comprises:
exposing the first section of the one or more modified surface layers to the electron source for a first time period, and exposing the second section of the one or more modified surface layers to the electron source for a second time period.

8 . The method of claim 1 , further comprising:
neutralizing, after the exposing, a charge on the substrate.

9 . The method of claim 1 , wherein the exposing further comprises exposing the one or more modified surface layers on the substrate to the electron source at a beam energy level that is sufficient to cause anisotropic removal of the one or more modified surface layers from the substrate.

10 . The method of claim 1 , wherein the exposing further comprises exposing the one or more modified surface layers on the substrate to the electron source at a beam energy level that is sufficient to cause isotropic removal of the one or more modified surface layers from the substrate.

11 . The method of claim 1 , wherein the exposing further comprises exposing the one or more modified surface layers on the substrate to the electron source at a beam energy level that is sufficient to cause partial anisotropic removal of the one or more modified surface layers from the substrate.

12 . The method of claim 1 , further comprising:
flowing, before or during the modifying, a first process gas onto the substrate, wherein the first process gas is configured to modify the one or more surface layers of material on the substrate.

13 . The method of claim 1 , wherein the modifying further comprises exposing the one or more surface layers of material on the substrate to a plasma.

14 . The method of claim 1 , further comprising:
repeating, while the substrate remains in a processing chamber, the modifying of one or more surface layers of material on the substrate and the exposing the one or more modified surface layers on the substrate to the electron source.

15 . The method of claim 14 , further comprising:
purging the processing chamber between modifying and exposing operations.

16 . The method of claim 1 , wherein the material has a surface binding energy of less than about 4.5 electron volts (eV).

17 . The method of claim 16 , wherein the material comprises one or more of: copper, aluminum, germanium, gold, and silver.

18 . The method of claim 1 , wherein substrate temperature during the modifying and the exposing is substantially the same.

19 . A method of processing a substrate, the method comprising:
modifying one or more surface layers of material on the substrate; converting, after the modifying, the one or more modified surface layers on the substrate to one or more converted layers; and exposing the one or more converted layers on the substrate to an electron source thereby removing, without using a plasma, the one or more converted surface layers on the substrate.

20 . The method of claim 19 , wherein the converting further comprises flowing a second process gas onto the substrate, wherein the second process gas is configured to convert the one or more modified surface layers on the substrate to the one or more converted layers.

21 . The method of claim 19 , wherein the modifying further comprises exposing the one or more surface layers of material on the substrate to a plasma.

22 . The method of claim 19 , wherein the converting further comprises exposing the one or more surface layers of material on the substrate to a plasma.

23 . An apparatus for semiconductor processing, the apparatus comprising:
a processing chamber that includes chamber walls that at least partially bound a chamber interior; a wafer support for positioning a substrate in the chamber interior; a process gas unit configured to flow a first process gas into the chamber interior and onto the substrate in the chamber interior; an electron source configured to expose electrons to the substrate positioned on the wafer support; and a controller, wherein the controller includes instructions that are configured to: cause the process gas unit to flow the first process gas to the substrate in the chamber interior, wherein the first process gas is configured to modify one or more layers of material on the substrate, and cause the electron source to generate the electrons and thereby expose the one or more modified surface layers on the substrate to the electrons, wherein the one or more modified surface layers are removed, without using a plasma.

24 . The apparatus of claim 23 , further comprising a vacuum unit configured to evacuate gases from the chamber interior, wherein the controller further comprises instructions configured to:
cause the vacuum unit to generate a vacuum in the chamber interior and purge gases from the chamber interior.

25 . The apparatus of claim 23 , further comprising a charge neutralization unit configured to neutralize a charge of the substrate, wherein the controller further comprises instructions configured to:
cause the charge neutralization unit to neutralize the charge of the substrate.

26 . The apparatus of claim 25 , wherein the charge neutralization unit is at least one of: a plasma source, an ultraviolet light source, and the electron source.

27 . The apparatus of claim 23 , further comprising a plasma generator configured to generate a plasma in the chamber interior, wherein:
the plasma generator is one of: a capacitively coupled plasma, an inductively coupled plasma, an upper remote plasma, and a lower remote plasma, and the controller further comprises instructions configured to cause the plasma generator to generate the plasma in the chamber interior.

28 . The apparatus of claim 23 , further comprising an isolation valve or shutter interposed between the chamber interior and the electron source, wherein the isolation valve or shutter are configured to allow the electrons to reach the chamber int

Assignees

• Lam Res Corp

Inventors

• Berry Iii Ivan L
• Lill Thorsten
• Fischer Andreas

Classifications

• H10P72/0421

  for drying etching · CPC title

• H10P50/283

  by chemical means · CPC title

• H10P50/267

  using plasmas · CPC title

• H10P50/242 Primary

  of Group IV materials · CPC title

• H10P50/269 Primary

  pre- or post-treatments, e.g. anti-corrosion processes · CPC title