Wireless Circuitry with Narrowband Error Vector Magnitude (EVM) Estimator
US-2024039764-A1 · Feb 1, 2024 · US
US2020366246A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2020366246-A1 |
| Application number | US-202016860645-A |
| Country | US |
| Kind code | A1 |
| Filing date | Apr 28, 2020 |
| Priority date | May 14, 2019 |
| Publication date | Nov 19, 2020 |
| Grant date | — |
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A temperature correction circuit and method for maintaining a transistor of a power amplifier in a linear operating region of the transistor. The temperature correction circuit includes a first current source circuit operable to provide a first correction current proportional to an absolute temperature of a semiconductor die including the transistor. The temperature correction circuit also includes a second current source circuit operable to provide a second correction current proportional to a change in temperature of a part of the semiconductor die in which the transistor is located during operation of the transistor. The temperature correction circuit further includes a third current source circuit operable to provide a gain selection current. The temperature correction circuit also includes circuitry for producing a reference current from the first and second correction currents and the gain current. The temperature correction circuit further includes an output for providing the reference current to the transistor.
Opening claim text (preview).
1 . A temperature correction circuit for maintaining a transistor of a power amplifier in a linear operating region of said transistor, the temperature correction circuit comprising: a first current source circuit operable to provide a first correction current proportional to an absolute, static temperature of a semiconductor die including said transistor; a second current source circuit operable to provide a second correction current proportional to a change in temperature of a part of said semiconductor die in which the transistor is located during operation of the transistor; a third current source circuit operable to provide a gain selection current; circuitry for producing a reference current from said first and second correction currents and said gain current; and an output for providing said reference current to said transistor. 2 . The temperature correction circuit of claim 1 , wherein the circuitry for producing a reference current comprises a static temperature sub-circuit configured to use said first correction current and said gain selection current to produce a contribution to the reference current associated with said absolute, static temperature of the die. 3 . The temperature correction circuit of claim 1 , wherein the circuitry for producing a reference current comprises a dynamic temperature sub-circuit configured to use said first correction current and said second current to produce a contribution to the reference current associated with said change in temperature of said part of the semiconductor die in which the transistor is located. 4 . The temperature correction circuit of claim 3 , wherein the dynamic temperature sub-circuit comprises: circuitry for producing said contribution to the reference current associated with said change in temperature of said part of the semiconductor die in which the transistor is located from the second correction current; and circuitry for removing a static part from said contribution using the first correction current. 5 . The temperature correction circuit of claim 2 , wherein the static temperature sub-circuit includes one or more programmable current mirrors for producing the contribution to the reference current associated with said absolute, static temperature of the die; and/or the dynamic temperature sub-circuit includes one or more programmable current mirrors for producing the contribution to the reference current associated with said change in temperature of said part of the semiconductor die in which the transistor is located. 6 . The temperature correction circuit of claim 5 , wherein the temperature correction circuit is configured to use one or more code words for controlling the current mirrors to produce said contributions to the reference current. 7 . The temperature correction circuit of claim 1 , wherein the reference current is for biasing the transistor of the power amplifier. 8 . The temperature correction circuit of claim 1 , configured to determine the gain selection current according to a gain mode of the power amplifier. 9 . The temperature correction circuit of claim 1 , wherein the first current source circuit includes a current mirror, a current source operable to output a current based on a bandgap voltage reference, and a pair of cross coupled transistors located at a temperature of said die. 10 . The temperature correction circuit of claim 9 , wherein the first current source circuit comprises: a first transistor pair comprising: a first transistor having a first current terminal, a second current terminal and a control terminal; and a second transistor having a first current terminal, a second current terminal and a control terminal; and a second transistor pair comprising: a first transistor having a first current terminal, a second current terminal and a control terminal; and a second transistor having a first current terminal, a second current terminal and a control terminal; and wherein: said pair of cross coupled transistors of said first current source circuit comprises said second transistor pair; the control terminal of the first transistor of the first transistor pair is coupled to the control terminal of the second transistor of the first transistor pair, the current source is coupled to the first current terminal of the first transistor of the first transistor pair and to the control terminals of the first transistor and the second transistor of the first transistor pair, the second current terminal of the first transistor of the first transistor pair is coupled to the first current terminal of the first transistor of the second transistor pair, the second current terminal of the second transistor of the first transistor pair is coupled to the first current terminal of the second transistor of the second transistor pair, the control terminal of the first transistor of the second transistor pair is coupled to the first current terminal of the second transistor of the second transistor pair, the control terminal of the second transistor of the second transistor pair is coupled to the first current terminal of the first transistor of the second transistor pair, the second current terminal of the first transistor of the second transistor pair is coupled to ground, and the second current terminal of the second transistor of the second transistor pair is coupled to ground via a resistor. 11 . The temperature correction circuit of claim 1 , wherein the second current source circuit includes a current mirror, a current source operable to output a current based on a bandgap voltage reference, and a pair of cross coupled transistors located at a temperature of a junction of said transistor of said power amplifier. 12 . The temperature correction circuit of claim 11 , wherein the first current source circuit comprises: a first transistor pair comprising: a first transistor having a first current terminal, a second current terminal and a control terminal; and a second transistor having a first current terminal, a second current terminal and a control terminal; and a second transistor pair comprising: a first transistor having a first current terminal, a second current terminal and a control terminal; and a second transistor having a first current terminal, a second current terminal and a control terminal; and wherein: said pair of cross coupled transistors of said second current source circuit comprises said second transistor pair; the control terminal of the first transistor of the first transistor pair is coupled to the control terminal of the second transistor of the first transistor pair, the current source is coupled to the first control terminal of the first transistor of the first transistor pair and to the control terminals of the first transistor and the second transistor of the first transistor pair, the second current terminal of the first transistor of the first transistor pair is coupled to the first current terminal of the first transistor of the second transistor pair, the second current terminal of the second transistor of the first transistor pair is coupled to the first current terminal of the second transistor of the second transistor pair, the control terminal of the first transistor of the second transistor pair is coupled to the first current terminal of the second transistor of the second transistor pair, the control terminal of the second transistor of the second transistor pair is coupled to the first current terminal of the first transistor of the second transistor pair, the second current terminal of the first transistor of the second transistor pair is coupled to ground, and the secon
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