Fabrication of Solid-State Battery Cells and Solid-State Batteries

US2020194773A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2020194773-A1
Application numberUS-201816631657-A
CountryUS
Kind codeA1
Filing dateJul 13, 2018
Priority dateJul 18, 2017
Publication dateJun 18, 2020
Grant date

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  1. Title

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  5. First independent claim

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Abstract

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At least one embodiment relates to a method fabricating a solid-state battery cell. The method includes forming a plurality of spaced electrically conductive structures on a substrate. Forming the plurality of spaced electrically conductive structures on the substrate includes transforming at least part of a valve metal layer into a template that includes a plurality of spaced channels aligned longitudinally along a first direction. Transforming at least part of the valve metal layer into the template includes a first anodization step, a second anodization step, an etching step in an etching solution, and a deposition step. The method also includes forming a first layer of active electrode material on the plurality of spaced electrically conductive structures, depositing an electrolyte layer over the first layer of active electrode material, and forming a second layer of active electrode material over the electrolyte later.

First claim

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1 . A method for fabricating a solid-state battery cell, the method comprising: forming a plurality of spaced electrically conductive structures on a substrate, wherein forming the plurality of spaced electrically conductive structures on the substrate comprises transforming at least part of a valve metal layer into a template comprising a plurality of spaced channels aligned longitudinally along a first direction, and wherein transforming at least part of the valve metal layer into the template comprises, a first anodization step, which anodizes at least part of the valve metal layer in a thickness direction to form a porous layer of valve metal oxide comprising a plurality of channels, wherein each channel comprises channel walls aligned longitudinally along the first direction and a channel bottom, wherein the channel bottom is coated with a first insulating metal oxide barrier layer as a result of the first anodization step and a protective treatment that induces hydrophobic surfaces to the channel walls and channel bottoms; a second anodization step after the protective treatment, which substantially removes the first insulating metal oxide barrier layer from the channel bottoms, to induce anodization only at the bottoms of the plurality of channels and create a second insulating metal oxide barrier layer at the channel bottoms; an etching step in an etching solution, wherein the etching step removes the second insulating metal oxide barrier layer from the channel bottoms; and depositing a solid functional material within the channels of the template to form the plurality of spaced structures inside the plurality of channels, wherein the plurality of spaced structures are aligned longitudinally along the first direction; forming a first layer of active electrode material on the plurality of spaced electrically conductive structures, wherein the first layer of active electrode material conformally coats surfaces of the plurality of spaced electrically conductive structures; depositing an electrolyte layer over the first layer of active electrode material; and forming a second layer of active electrode material over the electrolyte layer, wherein: the first layer of active electrode material forms a cathode layer of the solid-state battery cell and the second layer of active electrode material forms an anode layer of the solid-state battery cell; or the second layer of active electrode material forms the cathode layer of the solid-state battery cell and the first layer of active electrode material forms the anode layer of the solid-state battery cell. 2 . The method for according to claim 1 , wherein the valve metal layer comprises a layer of aluminum, an aluminum alloy, titanium, a titanium alloy, tantalum, or a tantalum alloy. 3 . The method according to claim 1 , wherein the protective treatment comprises annealing at a temperature in the range between 300° C. and 550° C. 4 . The method according to claim 1 , wherein the protective treatment comprises depositing a protective layer on the channel walls and on the channel bottoms, and wherein the second anodization step further comprises removing the protective layer only from the channel bottoms. 5 . The method according to claim 4 , wherein the protective layer comprises hydrophobic silane or a polymer that is resistant to the etching solution. 6 . The method according to claim 4 , wherein the protective layer comprises polystyrene, poly(methyl 2-methylpropanoate), or poly(dimethylsiloxane). 7 . The method according to claim 1 , wherein the etching solution is an aqueous etching solution comprising phosphoric acid, sulfuric acid, oxalic acid, chromic acid, ammonia, hydrogen peroxide, or potassium hydroxide. 8 . The method according to claim 1 , wherein the etching solution comprises a surface tension adjusting agent. 9 . The method according to claim 1 , further comprising providing ultrasonic waves during the second anodization step. 10 . The method according to claim 1 , wherein the first anodization step anodizes only a part of the valve metal layer in the thickness direction, to thereby form the template and a substrate supporting the template, and wherein the substrate comprises a remaining, non-anodized part of the valve metal layer. 11 . The method according to claim 1 , wherein depositing the solid functional material comprises depositing an electrically conductive material, a semiconductor material, or an electrically insulating material. 12 . (canceled) 13 . (canceled) 14 . (canceled) 15 . The method according to claim 1 , wherein forming the first layer of active electrode material comprises: depositing an interlayer on the substrate, wherein the interlayer comprises a transition metal oxide, a noble metal, or a noble-metal oxide, and wherein the interlayer has a thickness between 0.5 nm and 30 nm; depositing a functional material precursor layer on the interlayer; and activating the functional material precursor layer by annealing in order to form the layer of functional material. 16 . A method for fabricating a solid-state battery cell, the method comprising: forming a plurality of spaced electrically conductive structures on a substrate; forming a first layer of active electrode material on the plurality of spaced electrically conductive structures, wherein forming the first layer of active electrode material on the plurality of spaced electrically conductive structures comprises: depositing an interlayer on the substrate, wherein the interlayer comprises a transition metal oxide, a noble metal, or a noble-metal oxide, and wherein the interlayer has a thickness in the range between 0.5 nm and 30 nm; depositing a functional material precursor layer on the interlayer; and activating the functional material precursor layer by annealing in order to form the layer of functional material wherein the first layer of active electrode material conformally coats surfaces of the plurality of spaced electrically conductive structures; depositing an electrolyte layer over the first layer of active electrode material; and forming a second layer of active electrode material over the electrolyte layer, wherein: the first layer of active electrode material forms a cathode layer of the solid-state battery cell and the second layer of active electrode material forms an anode layer of the solid-state battery cell; or the second layer of active electrode material forms the cathode layer of the solid-state battery cell and the first layer of active electrode material forms the anode layer of the solid-state battery cell. 17 . The method according to claim 16 , wherein depositing the functional material precursor layer comprises depositing an electrode material precursor layer, and wherein activating the functional material precursor layer comprises annealing with an ion containing precursor present, thereby forming a layer of active electrode material. 18 . The method according to claim 16 , wherein depositing the functional material precursor layer comprises anodic electrodeposition. 19 . The method according to claim 16 , wherein the electrically conductive substrate is a transition metal substrate. 20 . The method according to claim 16 , wherein the electrically conductive substrate is a three-dimensional substrate comprising a plurality of electrically conductive structures being aligned longitudinally along a first direction. 21 . The method according to claim 20 , wherein the electrically conductiv

Assignees

Inventors

Classifications

  • Chemical after-treatment · CPC title

  • C25D1/006Primary

    Nanostructures, e.g. using aluminium anodic oxidation templates [AAO] · CPC title

  • characterised by the form (characterised by a channel configuration H01M8/0258) · CPC title

  • Porous electrodes · CPC title

  • Grids · CPC title

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What does patent US2020194773A1 cover?
At least one embodiment relates to a method fabricating a solid-state battery cell. The method includes forming a plurality of spaced electrically conductive structures on a substrate. Forming the plurality of spaced electrically conductive structures on the substrate includes transforming at least part of a valve metal layer into a template that includes a plurality of spaced channels aligned …
Who is the assignee on this patent?
Imec Vzw, Univ Leuven Kath
What technology area does this patent fall under?
Primary CPC classification C25D1/006. Mapped technology areas include Chemistry & Metallurgy.
When was this patent published?
Publication date Thu Jun 18 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).