Systems and methods of testing memory devices
US-2024387303-A1 · Nov 21, 2024 · US
US2020194321A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2020194321-A1 |
| Application number | US-201916249812-A |
| Country | US |
| Kind code | A1 |
| Filing date | Jan 16, 2019 |
| Priority date | Dec 13, 2018 |
| Publication date | Jun 18, 2020 |
| Grant date | — |
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The invention provides a testkey detection circuit, including a plurality of oscillators and a driving circuit. Each of the oscillators has an enable terminal, a voltage terminal and an output terminal, wherein the enable terminals are connected to a common enable terminal. The driving circuit receives the output terminals of the oscillators and increases a driving level of a selected one of the output terminals as a frequency output.
Opening claim text (preview).
What is claimed is: 1 . A testkey detection circuit, comprising: a plurality of oscillators, each of the oscillators having an enable terminal, a voltage terminal and an output terminal, wherein the enable terminals are connected to a common enable terminal; and a driving circuit, receiving the output terminals of the oscillators and increasing a driving level of a selected one of the output terminals as a frequency output. 2 . A testkey detection circuit, comprising: a plurality of oscillators, each of the oscillators having am enable terminal, a voltage terminal and an output terminal, wherein the enable terminals are connected to a common enable terminal; and a driving circuit, comprising: a multiplexer, receiving a plurality of frequency signals from a plurality of output terminals of the oscillators and outputting a selected one of the frequency signals; a divider, decreasing a frequency of the selected one of the frequency signals as a frequency-decreased signal; and a buffer, receiving the frequency-decreased signal to increase the driving level as a frequency output. 3 . The testkey detection circuit according to claim 2 , wherein the multiplexer comprises a plurality of selection terminals to select the one of the frequency signals. 4 . The testkey detection circuit according to claim 2 , wherein the driving circuit comprises a voltage source terminal to receive a voltage source to commonly provide the voltage source to the multiplexer, the divider and the buffer, and the testkey detection circuit is commonly grounded to a ground voltage. 5 . The testkey detection circuit according to claim 2 , wherein the oscillators are ring oscillators. 6 . The testkey detection circuit according to claim 2 , wherein the multiplexer sequentially outputs the frequency signals according to a selection order, so as to sequentially obtain a plurality of the frequency outputs. 7 . The testkey detection circuit according to claim 2 , wherein the oscillators are respectively operated in different conditions. 8 . The testkey detection circuit according to claim 2 , wherein the voltage terminals of the oscillators provide different voltage sources. 9 . The testkey detection circuit according to claim 2 , wherein the voltage terminals of the oscillators respectively probe a plurality of contact pads at different circuit positions in integrated circuits. 10 . The testkey detection circuit according to claim 2 , wherein the oscillators are a plurality of ring oscillators, and the ring oscillators are identical circuits or circuits in which at least one of the ring oscillators is different from the others. 11 . The testkey detection circuit according to claim 2 , wherein the driving circuit comprises a single voltage input terminal to provide an operation voltage to the multiplexer, the divider and the buffer.
Marks applied to devices, e.g. for alignment or identification · CPC title
Circuits for electrically characterising or monitoring manufacturing processes, e.g. circuits in tested chips or circuits in testing wafers · CPC title
using dedicated test connectors, test elements or test circuits on the IC under test (G01R31/2855 takes precedence) · CPC title
Testing of materials or semi-finished products, e.g. semiconductor wafers or substrates (G01R31/318511 takes precedence; testing during manufacture H10P74/00) · CPC title
Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP] (G01R31/318508 takes precedence; contactless testing G01R31/302; testing contacts or connections G01R31/66) · CPC title
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