Integrated heat spreader with multiple channels for multichip packages

US2020105643A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2020105643-A1
Application numberUS-201816144584-A
CountryUS
Kind codeA1
Filing dateSep 27, 2018
Priority dateSep 27, 2018
Publication dateApr 2, 2020
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An integrated heat spreader includes channel structures assembled in a frame. Each channel structure is independent of the other, and can be used to dissipate heat from integrated circuitry at a specific location within a package, and without allowing heat from that particular location to propagate to integrated circuitry at other locations within the package. Each channel structure can be implemented with metal having a high thermal conductivity (e.g., copper). The channel structures can be used in conjunction with liquid-based cooling or air-based cooling. The frame can be implemented with low thermal conductivity molding compound or plastic so the heat transfer from one channel structure to another is inhibited. The channel structures can have different configurations (e.g., straight, pillars, and/or pin fins) to provide different rates of flow, mixing, and/or cooling. The flow direction of air or liquid for the channel structures can be the same (parallel) or different (counter).

First claim

Opening claim text (preview).

What is claimed is: 1 . An integrated circuit package, comprising: a first die area on a substrate, the first die area including a first die; a second die area on the substrate and laterally adjacent to the first die area, the second die area including a second die; a first channel structure over the first die area and in thermal contact with the first die, the first channel structure having a thermal conductivity of greater than 200 Watts per meter-Kelvin (W/m-K), the first channel structure defining one or more channels through which coolant can flow; a second channel structure over the second die area and in thermal contact with the second die, the second channel structure having a thermal conductivity of greater than 200 W/m-K, the second channel structure defining one or more channels through which coolant can flow; and a thermally insulative material separating the first and second channel structures. 2 . The integrated circuit package of claim 1 , wherein the first and second channel structures include vertical fins extending between top and bottom surfaces, thereby forming the one or more channels. 3 . The integrated circuit package of claim 1 , wherein at least one of the first and second channel structures includes vertical pillars. 4 . The integrated circuit package of claim 3 , wherein at least some of the vertical pillars extend from a first surface of the corresponding channel structure and do not reach a second surface opposite the first surface. 5 . The integrated circuit package of claim 3 , wherein at least some of the vertical pillars extend from a first surface of the corresponding channel structure to a second surface opposite the first surface. 6 . The integrated circuit package of claim 1 , wherein at least one of the first and second channel structures includes pin fins. 7 . The integrated circuit package of claim 1 , wherein the coolant flows through the first channel structure in a first direction, and the coolant flows through the second channel structure in a second direction that is opposite the first direction. 8 . The integrated circuit package of claim 1 , wherein the first and second channel structures comprise copper or silver. 9 . An integrated circuit package, comprising: a first die area on a substrate, the first die area including a first die; a second die area on the substrate and laterally adjacent to the first die area, the second die area including a second die; a first metal channel structure over the first die area and in thermal contact with the first die, the first metal channel structure defining one or more channels through which coolant can flow; a second metal channel structure over the second die area and in thermal contact with the second die, the second metal channel structure defining one or more channels through which coolant can flow; and a frame material around the first and second metal channel structures, the frame material comprising a thermally insulative material, thereby inhibiting heat transfer between the first and second metal channel structures. 10 . The integrated circuit package of claim 9 , wherein the first and second metal channel structures include vertical fins extending between top and bottom surfaces, thereby forming the one or more channels. 11 . The integrated circuit package of claim 9 , wherein at least one of the first and second metal channel structures includes vertical pillars. 12 . The integrated circuit package of claim 9 , wherein at least one of the first and second metal channel structures includes pin fins. 13 . The integrated circuit package of claim 9 , further comprising: a third die area on the substrate and laterally adjacent to the first die area, the third die area including a third die, wherein the first die area is between the second die area and the third die area; and a third metal channel structure over the third die area and in thermal contact with the third die, the third metal channel structure defining one or more channels through which coolant can flow. 14 . The integrated circuit package of claim 13 , wherein the coolant flows through the second and third metal channel structures in a first direction, and the coolant flows through the first metal channel structure in a second direction that is opposite the first direction. 15 . The integrated circuit package of claim 13 , wherein the second die and the third die are the same die type, and the first die generates more heat than the second and third die. 16 . The integrated circuit package of claim 13 , wherein the second die and the third die are memory die, and the first die is a processor die. 17 . The integrated circuit package of claim 9 , wherein the coolant is a cooling fluid, and wherein the first and second metal channel structures comprise copper or silver. 18 . A method forming an integrated circuit package, comprising: providing a first metal channel structure over a first die area on a substrate and in thermal contact with a first die within the first die area, the first metal channel structure defining one or more channels through which coolant can flow; providing a second channel structure over a second die area on the substrate and in thermal contact with a second die within the second die area, the second die area laterally adjacent to the first die area, the second metal channel structure defining one or more channels through which coolant can flow; and providing a thermally insulative material so as to thermally separate the first and second metal channel structures. 19 . The method of claim 18 , further comprising: providing a third metal channel structure over a third die area and in thermal contact with a third die within the third die area, the third die area laterally adjacent to the first die area such that the first die area is between the second die area and the third die area, the third metal channel structure defining one or more channels through which coolant can flow. 20 . The method of claim 18 , wherein the first and second metal channel structures are pre-fabricated.

Assignees

Inventors

Classifications

  • Electricity · mapped topic

  • H01L23/473Primary

    Electricity · mapped topic

  • Electricity · mapped topic

  • Electricity · mapped topic

  • Metallic materials (H10W40/254, H10W40/257, H10W40/255, H10W40/251, H10W40/253 take precedence) · CPC title

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What does patent US2020105643A1 cover?
An integrated heat spreader includes channel structures assembled in a frame. Each channel structure is independent of the other, and can be used to dissipate heat from integrated circuitry at a specific location within a package, and without allowing heat from that particular location to propagate to integrated circuitry at other locations within the package. Each channel structure can be impl…
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification H01L23/473. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Apr 02 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).