Memory device

Patent metadata

Field	Value
Publication number	US-2020083292-A1
Application number	US-201916352534-A
Country	US
Kind code	A1
Filing date	Mar 13, 2019
Priority date	Sep 11, 2018
Publication date	Mar 12, 2020
Grant date	—

Abstract

According to one embodiment, a memory device includes a first conductive layer, a second conductive layer, and a first layer. A direction from the first conductive layer toward the second conductive layer is aligned with a first direction. The first layer is provided between the first conductive layer and the second conductive layer. The first layer includes a first region including titanium and oxygen, a second region including aluminum and oxygen and being provided between the first conductive layer and the first region, and a third region including aluminum and oxygen and being provided between the first region and the second conductive layer. A surface area in a first plane of a brookite region included in the first region is 58 percent or more of a surface area in the first plane of the first region. The first plane crosses the first direction.

First claim

What is claimed is:

1 . A memory device, comprising:
a first conductive layer; a second conductive layer, a direction from the first conductive layer toward the second conductive layer being aligned with a first direction; and a first layer provided between the first conductive layer and the second conductive layer, the first layer including
a first region including titanium and oxygen,
a second region including aluminum and oxygen and being provided between the first conductive layer and the first region, and
a third region including aluminum and oxygen and being provided between the first region and the second conductive layer,
a surface area in a first plane of a brookite region included in the first region being 58 percent or more of a surface area in the first plane of the first region, the first plane crossing the first direction.

2 . The device according to claim 1 , wherein the surface area of the brookite region included in the first region is 59 percent or more of the surface area of the first region.

3 . A memory device, comprising:
a first conductive layer; a second conductive layer, a direction from the first conductive layer toward the second conductive layer being aligned with a first direction; and a first layer provided between the first conductive layer and the second conductive layer, the first layer including
a first region including titanium and oxygen,
a second region including aluminum and oxygen and being provided between the first conductive layer and the first region, and
a third region including aluminum and oxygen and being provided between the first region and the second conductive layer,
a surface area in a first plane of a brookite region included in the first region being not less than 1.4 times a surface area in the first plane of a rutile region included in the first region, the first plane crossing the first direction, the surface area of the brookite region included in the first region being greater than a surface area in the first plane of an anatase region included in the first region.

4 . The device according to claim 3 , wherein the surface area in the first plane of the rutile region included in the first region is greater than the surface area in the first plane of the anatase region included in the first region.

5 . The device according to claim 3 , wherein the surface area of the brookite region included in the first region is not less than 1.45 times the surface area of the rutile region included in the first region.

6 . The device according to claim 1 , wherein
the second region further includes titanium, the third region further includes titanium, and a concentration of titanium in the third region is higher than a concentration of titanium in the second region.

7 . The device according to claim 1 , wherein
in analysis using transmission electron microscopy-electron energy-loss spectroscopy in the first direction, an intensity of titanium in at least a portion of the second region is lower than an intensity of aluminum in the at least a portion of the second region, and in the analysis, an intensity of titanium in at least a portion of the third region is higher than an intensity of aluminum in the at least a portion of the third region.

8 . The device according to claim 7 , wherein in the analysis, an intensity of oxygen in the third region is higher than an intensity of oxygen in the first region.

9 . The device according to claim 8 , wherein in the analysis, an intensity of oxygen in the second region is higher than the intensity of oxygen in the first region.

10 . The device according to claim 1 , wherein
the first conductive layer extends along a second direction crossing the first direction, and the second conductive layer extends along a third direction crossing a first plane including the first direction and the second direction.

11 . The device according to claim 10 , wherein
a plurality of the first layers is provided, a plurality of the first conductive layers is provided, the first conductive layers are arranged along the third direction, a plurality of the second conductive layers is provided, the second conductive layers are arranged along the second direction, and one of the plurality of first layers is provided between one of the plurality of first conductive layers and one of the plurality of second conductive layers.

12 . The device according to claim 1 , further comprising:
a first interconnect; and a second interconnect, the first interconnect extending along a second direction crossing the first direction, the second interconnect extending along a third direction crossing a first plane including the first direction and the second direction, a first stacked body including the first conductive layer, the first layer, and the second conductive layer and being provided between the first interconnect and the second interconnect.

13 . The device according to claim 12 , wherein
a plurality of the first interconnects is provided, the plurality of first interconnects extends along the second direction, the plurality of first interconnects is mutually-separated in the third direction, the second interconnect extends along the third direction, and the first layer is provided between the second interconnect and one of the plurality of first interconnects and between the second interconnect and an other one of the plurality of first interconnects.

14 . The device according to claim 13 , wherein the first layer is further provided between the second interconnect and a region, the region being between the one of the plurality of first interconnects and the other one of the plurality of first interconnects.

15 . The device according to claim 13 , further comprising:
a plurality of third interconnects; a fourth interconnect; and a second stacked body, the plurality of third interconnects extending along the second direction, the plurality of third interconnects being mutually-separated in the third direction, the fourth interconnect extending along the third direction, a portion of the second interconnect being provided between one of the plurality of third interconnects and the one of the plurality of first interconnects, a portion of the fourth interconnect being provided between the portion of the second interconnect and the one of the plurality of third interconnects, the second stacked body being provided between the fourth interconnect and the one of the plurality of third interconnects.

16 . The device according to claim 15 , wherein
the second stacked body includes:
a third conductive layer;
a fourth conductive layer, a direction from the third conductive layer toward the fourth conductive layer being aligned with the first direction; and
a second layer provided between the third conductive layer and the fourth conductive layer,
the second layer includes:
a fourth region including titanium and oxygen;
a fifth region including aluminum and oxygen and being provided between the third conductive layer and the fourth region; and
a sixth region including aluminum and oxygen and being provided between the fourth region and the fourth conductive layer, and
a surface area in a second plane of a brookite region included in the fourth region is 58 percent or more of a surface area in the second plane of the fourth region, the second plane crossing the first direction.

17 . A memory device, comprising a plurality of stacked bodies,
one of the plurality of stacked bodies including:
a first conducti

Assignees

• Toshiba Memory Corp

Inventors

• Yamaguchi Marina
• Kabuyanagi Shoichi
• Saitoh Masumi

Classifications

• G11C2213/15

  Current-voltage curve · CPC title

• G11C2213/71

  Three dimensional array · CPC title

• G11C13/0007 Primary

  comprising metal oxide memory material, e.g. perovskites · CPC title

• G11C2213/32

  Material having simple binary metal oxide structure · CPC title

• H10W20/43

  Layouts of interconnections · CPC title