Package substrate and semiconductor package including the same
US-2024429153-A1 · Dec 26, 2024 · US
Power module substrate
US2019189548A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2019189548-A1 |
| Application number | US-201716301093-A |
| Country | US |
| Kind code | A1 |
| Filing date | May 17, 2017 |
| Priority date | May 19, 2016 |
| Publication date | Jun 20, 2019 |
| Grant date | — |
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- Title
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Abstract
Official abstract text for this publication.
A power module substrate of the present invention includes a ceramic substrate and a circuit layer having a circuit pattern. In an interface between the circuit layer and the ceramic substrate, a Cu—Sn layer and a Ti-containing layer are laminated in this order from the ceramic substrate side. In a cross-sectional shape of an end portion of the circuit pattern of the circuit layer, an angle θ formed between a surface of the ceramic substrate and an end face of the Cu—Sn layer is set in a range equal to or greater than 80° and equal to or smaller than 100°, and a maximum protrusion length L of the Cu—Sn layer or the Ti-containing layer from an end face of the circuit layer is set in a range equal to or greater than 2μm and equal to or smaller than 15 μm.
First claim
Opening claim text (preview).
1 . A power module substrate comprising: a ceramic substrate; and a circuit layer which is formed on one surface of the ceramic substrate and has a circuit pattern, wherein the circuit layer is made of Cu or a Cu alloy, in an interface between the circuit layer and the ceramic substrate, a Cu—Sn layer in which Sn forms a solid solution in Cu and a Ti-containing layer containing Ti are laminated in this order from the ceramic substrate side, and in a cross-sectional shape of an end portion of the circuit pattern of the circuit layer, an angle θ formed between a surface of the ceramic substrate and an end face of the Cu—Sn layer is set in a range equal to or greater than 80° and equal to or smaller than 100°, and a maximum protrusion length L of the Cu—Sn layer or the Ti-containing layer from an end face of the circuit layer is set in a range equal to or greater than 2 μm and equal to or smaller than 15 μm. 2 . The power module substrate according to claim 1 , wherein in the cross-sectional shape of the end portion of the circuit pattern of the circuit layer, an end face of the Ti-containing layer is positioned on an extended plane of the end face of the Cu—Sn layer.
Assignees
Inventors
Classifications
between a chip and a stacked insulating package substrate, interposer or RDL · CPC title
Shapes or dispositions thereof · CPC title
Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) · CPC title
Arrangements for heating · CPC title
having a laminate or multilayered structure, e.g. direct bond copper [DBC] ceramic substrates · CPC title
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- What does patent US2019189548A1 cover?
- A power module substrate of the present invention includes a ceramic substrate and a circuit layer having a circuit pattern. In an interface between the circuit layer and the ceramic substrate, a Cu—Sn layer and a Ti-containing layer are laminated in this order from the ceramic substrate side. In a cross-sectional shape of an end portion of the circuit pattern of the circuit layer, an angle θ f…
- Who is the assignee on this patent?
- Mitsubishi Materials Corp
- What technology area does this patent fall under?
- Primary CPC classification H10W70/685. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Thu Jun 20 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).