Solar cell and method for manufacturing the same

Patent metadata

Field	Value
Publication number	US-2019148573-A1
Application number	US-201916250463-A
Country	US
Kind code	A1
Filing date	Jan 17, 2019
Priority date	Nov 28, 2014
Publication date	May 16, 2019
Grant date	—

Abstract

A solar cell can include a silicon semiconductor substrate; an oxide layer on a first surface of the silicon semiconductor substrate; a polysilicon layer on the oxide layer; a diffusion region at a second surface of the silicon semiconductor substrate; a dielectric film on the polysilicon layer; a first electrode connected to the polysilicon layer through the dielectric film; a passivation film on the diffusion region; and a second electrode connected to the diffusion region through the passivation film.

First claim

What is claimed is:

1 . A solar cell, comprising:
a silicon semiconductor substrate; an oxide layer on a first surface of the silicon semiconductor substrate; a polysilicon layer on the oxide layer; a diffusion region at a second surface of the silicon semiconductor substrate; a dielectric film on the polysilicon layer; a first electrode connected to the polysilicon layer through the dielectric film; a passivation film on the diffusion region; and a second electrode connected to the diffusion region through the passivation film.

2 . The solar cell of claim 1 , wherein the first electrode comprises a plurality of first finger electrodes spaced apart from each other and extended in parallel in a first direction, and
wherein the second electrode comprises a plurality of second finger electrodes spaced apart from each other and extended in parallel in the first direction.

3 . The solar cell of claim 2 , wherein the first electrode further comprises a first bus bar connected to the plurality of first finger electrodes, and
wherein the second electrode further comprises a second bus bar connected to the plurality of second finger electrodes.

4 . The solar cell of claim 1 , wherein the silicon semiconductor substrate is single-crystal silicon semiconductor substrate.

5 . The solar cell of claim 1 , wherein the polysilicon layer is doped by impurities of a first conductive type and the diffusion region is doped by diffusing impurities of a second conductive type.

6 . The solar cell of claim 1 , further comprising an isolation portion for preventing a contact between the polysilicon layer of the first conductive type and the diffusion region of the second conductive type,
wherein the isolation portion is formed on at least one of the first surface of the silicon semiconductor substrate, a side surface of the silicon semiconductor substrate, or the second surface of the silicon semiconductor substrate.

7 . The solar cell of claim 6 , wherein the isolation portion excludes the oxide layer and the polysilicon layer, and is in an edge portion of the first surface of the silicon semiconductor substrate, and
wherein the dielectric film covers the first surface of the silicon semiconductor substrate and the isolation portion together.

8 . The solar cell of claim 6 , wherein a width of the isolation portion is 1 nm to 1 mm.

9 . The solar cell of claim 6 , wherein a thickness of the edge region in the polysilicon layer progressively decreases toward the isolation portion.

10 . The solar cell of claim 1 , wherein the dielectric film comprises a side portion extending up a side surface of the silicon semiconductor substrate.

11 . The solar cell of claim 10 , wherein the passivation film comprises a side portion formed on the side surface of the silicon semiconductor substrate, and
wherein the side portion of the dielectric film on the side surface of the silicon semiconductor substrate is on the side portion of the passivation film.

12 . The solar cell of claim 1 , wherein the second surface of the silicon semiconductor substrate is a light incident surface, the first surface of the silicon semiconductor substrate is a back surface of the silicon semiconductor substrate, and the polysilicon layer forms a back surface field region.

13 . The solar cell of claim 3 , wherein all of the plurality of first finger electrodes and the first bus bar are connected to the polysilicon layer through the dielectric film.

14 . The solar cell of claim 13 , wherein all of the plurality of first finger electrodes and the first bus bar have a single layer structure or a double layer structure.

15 . The solar cell of claim 13 , wherein the plurality of first finger electrodes have a single layer structure, and
wherein the first bus bar has a double layer structure.

16 . The solar cell of claim 1 , wherein the dielectric film and the passivation film are formed of a plurality of layers.

17 . The solar cell of claim 1 , wherein a thickness of the polysilicon layer is more than a thickness of the dielectric film.

18 . The solar cell of claim 1 , wherein a contact area in which the first electrode is connected to the polysilicon layer, includes a plurality of metal crystals extracted from the first electrode.

19 . A method for manufacturing a solar cell, the method comprising:
forming a oxide layer on a first surface of a silicon semiconductor substrate; forming a polysilicon layer on the oxide layer; forming a diffusion region at a second surface of the silicon semiconductor substrate; forming a dielectric film on the polysilicon layer; forming a passivation film on the diffusion region; forming a first electrode connected to the polysilicon layer through the dielectric film; and forming a second electrode connected to the diffusion region through the passivation film.

20 . The method of claim 19 , further comprising:
forming an opening portion in the dielectric film.

21 . The method of claim 20 , wherein the forming the opening portion in the dielectric film is performed by thermal treatment in the forming the first or second electrodes.

22 . The method of claim 21 , wherein the forming the first electrode comprises:
printing a paste for first finger electrodes for forming the first finger electrodes and a paste for a first bus bar for forming the first bus bar on the dielectric film; and performing thermal treatment on the pastes.

23 . The method of claim 22 , wherein in the forming the first electrode, a highest temperature for the thermal treatment is between 795° C. to 870° C.

24 . The method of claim 22 , wherein in the forming the first electrode, the paste for the first finger electrodes and the paste for the first bus bar are printed through a single process.

25 . The method of claim 24 , wherein a material included in the paste for the first finger electrodes is identical with a material included in the paste for the first bus bar.

26 . The method of claim 22 , wherein in the forming the first electrode, the paste for the first finger electrodes and the paste for the first bus bar are printed using separate printing processes.

27 . The method of claim 26 , wherein a material included in the paste for the first finger electrodes and a material included in the paste for the first bus bar are different.

28 . The method of claim 19 , further comprising:
forming an intrinsic semiconductor layer on the oxide layer, wherein, in the forming the polysilicon layer, impurities of a first conductive type are doped into the intrinsic semiconductor layer.

29 . The method of claim 19 , wherein the first surface of the silicon semiconductor substrate is a back surface of a semiconductor substrate.

30 . The method of claim 19 , wherein in the forming the oxide layer, the oxide layer is formed on the first and second surfaces of the silicon semiconductor substrate.

31 . The method of claim 19 , further comprising:
removing the oxide layer and the polysilicon layer placed at least on the second surface of the silicon semiconductor substrate prior to the forming the diffusion region after the forming the polysilicon layer.

32 . The method of claim 19 , wherein the polysilicon layer is doped by a thermal expansion of impuri

Assignees

• Lg Electronics Inc

Inventors

• Ha Jungmin
• Kim Sungjin
• Cheong Juhwa
• Ahn Junyong
• Choi Hyungwook
• Chang Wonjae
• Kim Jaesung

Classifications

• Y02E10/50

  Photovoltaic [PV] energy · CPC title

• H01L31/1864

  Electricity · mapped topic

• H01L31/1824

  Electricity · mapped topic

• H01L31/077

  Electricity · mapped topic

• H01L31/1868

  Electricity · mapped topic