Method for producing single crystal and method for producing silicon wafer
US-2017283980-A1 · Oct 5, 2017 · US
Epitaxial growth of defect-free, wafer-scale single-layer graphene on thin films of cobalt
US2019139762A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2019139762-A1 |
| Application number | US-201816234711-A |
| Country | US |
| Kind code | A1 |
| Filing date | Dec 28, 2018 |
| Priority date | Oct 1, 2015 |
| Publication date | May 9, 2019 |
| Grant date | — |
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Abstract
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A method for depositing a layer of graphene directly on the surface of a substrate, such as a semiconductor substrate is provided. Due to the strong adhesion of graphene and cobalt to a semiconductor substrate, the layer of graphene is epitaxially deposited.
First claim
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What is claimed is: 1 . A multilayer structure comprising: a silicon wafer, the silicon wafer comprising a front wafer surface, a back wafer surface, and a circumferential wafer edge joining the front wafer surface and the back wafer surface; a dielectric layer in contact with the front wafer surface of the silicon wafer; a layer comprising single crystalline cobalt in contact with the dielectric layer, the layer comprising single crystalline cobalt comprising a front cobalt layer surface, a back cobalt layer surface, and a bulk cobalt layer region between the front cobalt layer surface and the back cobalt layer surface, wherein the back layer cobalt surface is in contact with the dielectric layer; and a graphene layer in contact with the front cobalt layer surface of the layer comprising single crystalline cobalt. 2 . The multilayer structure of claim 1 wherein the silicon wafer comprises a dopant selected from the group consisting of boron (p type), gallium (p type), phosphorus (n type), antimony (n type), and arsenic (n type), and any combination thereof. 3 . The multilayer structure of claim 1 wherein the silicon wafer comprises boron (p type) dopant. 4 . The multilayer structure of claim 1 wherein the silicon wafer comprises phosphorus (n type) dopant. 5 . The multilayer structure of claim 1 wherein the silicon wafer comprises arsenic (n type) dopant. 6 . The multilayer structure of claim 1 wherein the dielectric layer is selected from the group consisting of a silicon dioxide layer, a silicon nitride layer, a silicon oxynitride layer, and any combination thereof. 7 . The multilayer structure of claim 1 wherein the dielectric layer is a multilayer comprising at least two of a silicon dioxide layer, a silicon nitride layer, and a silicon oxynitride layer. 8 . The multilayer structure of claim 1 wherein the dielectric layer is between about 10 nanometers and about 1000 nanometers thick. 9 . The multilayer structure of claim 1 wherein the dielectric layer is between about 50 nanometers and about 300 nanometers thick. 10 . The multilayer structure of claim 1 wherein the layer comprising single crystalline cobalt is between about 50 nanometers and about 20 micrometers thick. 11 . The multilayer structure of claim 1 wherein the layer comprising single crystalline cobalt is between about 50 nanometers and about 10 micrometers thick. 12 . The multilayer structure of claim 1 wherein the layer comprising single crystalline cobalt is between about 50 nanometers and about 1 micrometer thick. 13 . The multilayer structure of claim 1 wherein the graphene layer has a single mono-atomic thickness. 14 . The multilayer structure of claim 1 wherein the graphene layer has a quality factor of at least about 4. 15 . The multilayer structure of claim 1 wherein the graphene layer has a quality factor of at least about 7. 16 . The multilayer structure of claim 1 wherein the graphene layer has a quality factor of at least about 7.5.
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Classifications
consisting of two layers · CPC title
being conductive materials · CPC title
being insulating materials · CPC title
being crystalline insulating materials · CPC title
Arsenides · CPC title
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Frequently asked questions
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- What does patent US2019139762A1 cover?
- A method for depositing a layer of graphene directly on the surface of a substrate, such as a semiconductor substrate is provided. Due to the strong adhesion of graphene and cobalt to a semiconductor substrate, the layer of graphene is epitaxially deposited.
- Who is the assignee on this patent?
- Globalwafers Co Ltd
- What technology area does this patent fall under?
- Primary CPC classification H10P14/3406. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Thu May 09 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).