Analog to digital converter

Patent metadata

Field	Value
Publication number	US-2018367159-A1
Application number	US-201715628025-A
Country	US
Kind code	A1
Filing date	Jun 20, 2017
Priority date	Jun 20, 2017
Publication date	Dec 20, 2018
Grant date	—

Abstract

An analog-to-digital converter (“ADC”) includes an analog voltage sampler having an energy storage device, such as a capacitive element, configured to charge based on an analog input voltage. A timer determines an elapsed time for the energy storage device to discharge to a predetermined value. The ADC outputs a digital value representing the analog input voltage based on the determined elapsed time.

First claim

1 . An analog-to-digital converter (“ADC”), comprising:
an analog voltage input terminal;
a start terminal;
an analog voltage sampler including an energy storage device connected to the analog voltage input terminal, the analog voltage sampler being configured to:
directly sample an analog input voltage received at the analog voltage input terminal and charge the energy storage device to the level of the analog input voltage,
discharge the energy storage device in response to a first signal received at the start terminal, and
output a second signal in response to the energy storage device discharging to a predetermined reference level; and

a timer configured to:
receive the first signal and the second signal,
determine an elapsed time between receiving the first signal and the second signal, and
output a digital value representing the analog input voltage based on the determined elapsed time.

2 . The ADC of claim 1 , wherein the energy storage device comprises a capacitive element connected to receive the analog input voltage and charge to a level based on the received analog input voltage.

3 . The ADC of claim 2 , further comprising a discharge terminal configured to receive a constant current source for discharging the capacitive element in response to the first signal.

4 . The ADC of claim 2 , wherein the analog voltage sampler includes a comparator having a first input terminal configured to receive a discharge voltage from the capacitive element and a second input terminal configured to receive a reference voltage, the comparator configured to output the second signal in response to the discharge voltage reaching the reference voltage.

5 . The ADC of claim 1 , further comprising an oscillator configured to output a clock signal in response to receiving the first signal.

6 . The ADC of claim 5 , wherein the oscillator comprises a plurality of inverters connected in series.

7 . The ADC of claim 5 , wherein the timer includes a counter configured to receive the clock signal from the oscillator, and wherein the clock signal increments the counter until the second signal is output.

8 . The ADC of claim 1 , further comprising:
a plurality of the ADCs connected in parallel; a plurality of sample and hold devices corresponding to the plurality of ADCs, the plurality of sample and hold devices being connected to the analog input voltage terminal and configured to distribute the received analog input voltage among the plurality of ADCs.

9 . The ADC of claim 2 , wherein the comparator comprises an inverter.

10 . An analog-to-digital conversion (“ADC”) method, comprising:
receiving an analog input voltage;
directly sampling the analog input voltage by an energy storage device, including charging the energy storage device by the analog input voltage to the level of the analog input value;
receiving a first signal;
discharging the energy storage device in response to the first signal;
starting a timer in response to the first signal;
receiving a second signal in response to the energy storage device discharging to a predetermined reference level;
determining a discharge time required for the energy storage device to discharge based on the elapsed time between the first and second signals; and
converting the determined discharge time to a digital voltage value.

11 . The method of claim 10 , wherein the energy storage device is discharged in response to receiving a first signal, and wherein the method further comprises outputting a second signal in response to the energy storage device discharging to a predetermined level.

12 . The method of claim 11 , wherein determining the discharge time includes determining an elapsed time between receiving the first signal and outputting the second signal.

13 . The method of claim 10 , wherein determining the discharge time includes starting an oscillator in response to receiving the first signal, wherein the oscillator outputs a clock signal.

14 . The method of claim 12 , wherein determining the discharge time includes outputting the clock signal to a counter, and wherein the clock signal increments the counter until the second signal is output.

15 . The method of claim 10 , wherein charging the energy storage device comprises charging a capacitive element with the analog input voltage, and wherein discharging the energy storage device comprises discharging the capacitive element with a constant current source.

16 . The method of claim 10 , wherein determining the discharge time includes comparing a voltage level of the energy storage device to a reference voltage.

17 . The method of claim 10 , further comprising distributing the analog input voltage among a plurality of energy storage devices that include the energy storage device.

18 . A method of calibrating an analog-to-digital converter (“ADC”), comprising:
applying a known minimum analog input voltage to an input terminal of an ADC, wherein the ADC comprises
an analog voltage sampler including a capacitive element connected to receive the input analog input voltage and charge based thereon;
a current source for selectively discharging the capacitive element;
a timer configured to determine a discharge time for the capacitive element to discharge to a predetermined voltage level, and output a digital code representing the analog input voltage based on the determined discharge time;

determining a minimum digital code output by the ADC corresponding to the known minimum analog input voltage;
determining a difference between the minimum digital code output by the ADC and an expected minimum digital code; and
adjusting the predetermined reference value in response to the determined difference.

19 . The method of claim 18 , further comprising:
determining an output code range; determining an input voltage range; comparing the output code range and the input voltage range; and adjusting the current source in response to the comparison.

20 . The method of claim 19 , further comprising:
applying a known maximum analog input voltage to the input terminal of the ADC, determining a maximum digital code output by the ADC corresponding to the known maximum analog input voltage; wherein determining the output code range includes determining a difference between the maximum digital code and the minimum digital code; and wherein determining the input voltage range includes determining a difference between the maximum input voltage and the minimum input voltage.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Soenen Eric
• Roth Alan

Classifications

• H03M1/442 Primary

  using switched capacitors · CPC title

• H03M1/206

  using a logic interpolation circuit · CPC title

• H03M1/34

  Analogue value compared with reference values (H03M1/48 takes precedence) · CPC title

• H03M1/1245

  Details of sampling arrangements or methods · CPC title

• H03M1/52 Primary

  Input signal integrated with linear return to datum · CPC title