Reducing Autodoping of III-V Semiconductors By Atomic Layer Epitaxy (ALE)

US2018342392A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2018342392-A1
Application numberUS-201816047952-A
CountryUS
Kind codeA1
Filing dateJul 27, 2018
Priority dateJun 30, 2015
Publication dateNov 29, 2018
Grant date

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Abstract

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In one aspect, a method for forming a doped III-V semiconductor material on a substrate includes the steps of: (a) forming a first monolayer on the substrate, wherein the first monolayer comprises at least one group III or at least one group V element; and (b) forming a doped second monolayer on a side of the first monolayer opposite the substrate, wherein the second monolayer comprises either i) at least one group V element if the first monolayer comprises at least one group III element, or ii) at least one group III element if the first monolayer comprises at least one group V element, wherein a dopant is selectively introduced only during formation of the second monolayer, and wherein steps (a) and (b) are performed using atomic layer epitaxy. Doped III-V semiconductor materials are also provided.

First claim

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What is claimed is: 1 . A method for forming a doped III-V semiconductor material on a substrate, the method comprising the steps of: (a) forming a first monolayer on the substrate, wherein the first monolayer comprises at least one group III or at least one group V element; and (b) forming a doped second monolayer on a side of the first monolayer opposite the substrate by first depositing a dopant onto the first monolayer and then depositing either i) at least one group V element if the first monolayer comprises at least one group III element, or ii) at least one group III element if the first monolayer comprises at least one group V element onto the first monolayer, wherein steps (a) and (b) are performed using atomic layer epitaxy. 2 . The method of claim 1 , wherein the substrate comprises an indium phosphide substrate. 3 . The method of claim 1 , wherein the step (a) comprises the steps of: contacting the substrate with at least one group III or at least one group V element vapor phase epitaxy source under conditions sufficient to form the first monolayer on the substrate; and purging any remaining reactants. 4 . The method of claim 3 , wherein the conditions sufficient to form the first monolayer on the substrate comprise a temperature of from about 350° C. to about 500° C., and ranges therebetween, and a duration of from about 1 second to about 20 seconds, and ranges therebetween. 5 . The method of claim 3 , wherein the purging is performed using an inert gas flow. 6 . The method of claim 5 , wherein the inert gas flow comprises a hydrogen gas flow. 7 . The method of claim 3 , wherein the III-V semiconductor material comprises indium gallium arsenide (InGaAs) and, in the step (a), the substrate is contacted with at least one group V element vapor phase epitaxy source. 8 . The method of claim 7 , wherein the at least one group V element vapor phase epitaxy source comprises tertiary butyl arsine. 9 . The method of claim 1 , wherein the step (b) comprises the step of: contacting the substrate and the first monolayer with a dopant source under conditions sufficient to form a non-continuous monolayer of dopant atoms on the first monolayer. 10 . The method of claim 9 , wherein the conditions sufficient to form the non-continuous monolayer of dopant atoms on the first monolayer comprise a temperature of from about 350° C. to about 500° C., and ranges therebetween, and a duration of from about 1 second to about 20 seconds, and ranges therebetween. 11 . The method of claim 1 , wherein the step (b) comprises the steps of: contacting the substrate with at least one group III or at least one group V element vapor phase epitaxy source and a source of the dopant under conditions sufficient to form the second monolayer on the substrate; and purging any remaining reactants. 12 . The method of claim 11 , wherein the conditions sufficient to form the second monolayer on the substrate comprise a temperature of from about 350° C. to about 500° C., and ranges therebetween, and a duration of from about 1 second to about 20 seconds, and ranges therebetween. 13 . A method for forming a doped III-V semiconductor material on a substrate, the method comprising the steps of: (a) forming a first monolayer on the substrate, wherein the first monolayer comprises at least one group III or at least one group V element, and wherein the step (a) comprises the steps of: contacting the substrate with at least one group III or at least one group V element vapor phase epitaxy source under conditions sufficient to form the first monolayer on the substrate, and purging any remaining reactants; and (b) forming a doped second monolayer on a side of the first monolayer opposite the substrate by first depositing a dopant onto the first monolayer and then depositing either i) at least one group V element if the first monolayer comprises at least one group III element, or ii) at least one group III element if the first monolayer comprises at least one group V element onto the first monolayer, wherein the step (b) comprises the steps of: contacting the substrate with at least one group III or at least one group V element vapor phase epitaxy source and a source of the dopant under conditions sufficient to form the second monolayer on the substrate, and purging any remaining reactants, wherein steps (a) and (b) are performed using atomic layer epitaxy. 14 . The method of claim 13 , wherein the substrate comprises an indium phosphide substrate. 15 . The method of claim 13 , wherein the conditions sufficient to form the first monolayer on the substrate comprise a temperature of from about 350° C. to about 500° C., and ranges therebetween, and a duration of from about 1 second to about 20 seconds, and ranges therebetween. 16 . The method of claim 13 , wherein the conditions sufficient to form the second monolayer on the substrate comprise a temperature of from about 350° C. to about 500° C., and ranges therebetween, and a duration of from about 1 second to about 20 seconds, and ranges therebetween. 17 . A doped III-V semiconductor material, comprising: at least one first monolayer, wherein the at least one first monolayer comprises only group V atoms; and at least one second monolayer on the at least one first monolayer, wherein the at least one second monolayer comprises only group III atoms and dopant atoms, such that the dopant atoms occupy only group III sites in the doped III-V semiconductor material. 18 . The doped III-V semiconductor material of claim 17 , wherein the at least one first monolayer is disposed on a substrate. 19 . The doped III-V semiconductor material of claim 17 , wherein the substrate comprises an indium phosphide substrate. 20 . The doped III-V semiconductor material of claim 17 , wherein the dopant atoms comprise silicon, tin, germanium or carbon atoms.

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What does patent US2018342392A1 cover?
In one aspect, a method for forming a doped III-V semiconductor material on a substrate includes the steps of: (a) forming a first monolayer on the substrate, wherein the first monolayer comprises at least one group III or at least one group V element; and (b) forming a doped second monolayer on a side of the first monolayer opposite the substrate, wherein the second monolayer comprises either …
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification H10P14/3421. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Nov 29 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).