Method of forming two-dimensional and three-dimensional semiconductor chip arrays

US2018337208A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2018337208-A1
Application numberUS-201715596292-A
CountryUS
Kind codeA1
Filing dateMay 16, 2017
Priority dateMay 16, 2017
Publication dateNov 22, 2018
Grant date

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Abstract

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A sensor chip formed from a plurality of sensor chips fabricated on a wafer, the wafer including a top surface, a bottom surface opposite the top surface and a thickness between the top and bottom surfaces, the sensor chip including an active area formed on the top surface, a first sacrificial edge including a first fiducial and a second fiducial, and a first score line formed in a first portion of the thickness on the top surface between the first sacrificial edge and the active area.

First claim

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1 . A method of fabricating an array of a plurality of sensor chips on a substrate, the method comprising: forming a first sensor chip of the plurality of sensor chips, the first sensor chip comprising a first sacrificial edge and a second sacrificial edge, each of the first and second sacrificial edges comprises a first fiducial and a second fiducial; bonding the first sensor chip to the substrate; forming a second sensor chip of the plurality of sensor chips, the second sensor chip comprising a third sacrificial edge and a fourth sacrificial edge, each of the third and fourth sacrificial edges comprises a first fiducial and a second fiducial; performing at least one of the following steps of aligning: aligning at least one of the first and second fiducials of the first sacrificial edge with at least one of the first second fiducials of the fourth sacrificial edge; and, aligning at least one of the first and second fiducials of the second sacrificial edge with at least one of the first second fiducials of the third sacrificial edge; and, bonding the second sensor chip to the substrate. 2 . The method of claim 1 further comprising: forming a third sensor chip of the plurality of sensor chips, the third sensor chip comprising a fifth sacrificial edge and a sixth sacrificial edge, each of the fifth and sixth sacrificial edges comprises a first fiducial and a second fiducial; performing at least one of the following steps of aligning: aligning at least one of the first and second fiducials of the first sacrificial edge with at least one of the first second fiducials of the sixth sacrificial edge; and, aligning at least one of the first and second fiducials of the second sacrificial edge with at least one of the first second fiducials of the fifth sacrificial edge; and, bonding the third sensor chip to the substrate. 3 . The method of claim 2 further comprising: forming a fourth sensor chip of the plurality of sensor chips, the fourth sensor chip comprising a seventh sacrificial edge and an eighth sacrificial edge, each of the seventh and eighth sacrificial edges comprises a first fiducial and a second fiducial; performing at least one of the following steps of aligning: aligning at least one of the first and second fiducials of the fourth sacrificial edge with at least one of the first second fiducials of the seventh sacrificial edge; aligning at least one of the first and second fiducials of the third sacrificial edge with at least one of the first second fiducials of the eighth sacrificial edge; aligning at least one of the first and second fiducials of the sixth sacrificial edge with at least one of the first second fiducials of the seventh sacrificial edge; and, aligning at least one of the first and second fiducials of the fifth sacrificial edge with at least one of the first second fiducials of the eighth sacrificial edge; and, bonding the fourth sensor chip to the substrate. 4 . The method of claim 3 further comprising: removing the first and sixth sacrificial edges; forming a fifth sensor chip of the plurality of sensor chips, the fifth sensor chip comprising a ninth sacrificial edge and a tenth sacrificial edge, each of the ninth and tenth sacrificial edges comprises a first fiducial and a second fiducial; performing at least one of the following steps of aligning: aligning at least one of the first and second fiducials of the second sacrificial edge with at least one of the first second fiducials of the tenth sacrificial edge; aligning at least one of the first and second fiducials of the third sacrificial edge with at least one of the first second fiducials of the tenth sacrificial edge; and, aligning at least one of the first and second fiducials of the fourth sacrificial edge with at least one of the first second fiducials of the tenth sacrificial edge; and, bonding the fifth sensor chip to the substrate. 5 . The method of claim 4 further comprising: forming a sixth sensor chip of the plurality of sensor chips, the sixth sensor chip comprising an eleventh sacrificial edge and a twelfth sacrificial edge, each of the eleventh and twelfth sacrificial edges comprises a first fiducial and a second fiducial; performing at least one of the following steps of aligning: aligning at least one of the first and second fiducials of the fifth sacrificial edge with at least one of the first second fiducials of the eleventh sacrificial edge; aligning at least one of the first and second fiducials of the eighth sacrificial edge with at least one of the first second fiducials of the eleventh sacrificial edge; aligning at least one of the first and second fiducials of the tenth sacrificial edge with at least one of the first second fiducials of the eleventh sacrificial edge; aligning at least one of the first and second fiducials of the seventh sacrificial edge with at least one of the first second fiducials of the twelfth sacrificial edge; and, aligning at least one of the first and second fiducials of the ninth sacrificial edge with at least one of the first second fiducials of the twelfth sacrificial edge; and, bonding the sixth sensor chip to the substrate. 6 . The method of claim 5 further comprising: removing the fifth, eighth and eleventh sacrificial edges; forming a seventh sensor chip of the plurality of sensor chips, the seventh sensor chip comprising a thirteenth sacrificial edge and a fourteenth sacrificial edge, each of the thirteenth and fourteenth sacrificial edges comprises a first fiducial and a second fiducial; performing at least one of the following steps of aligning: aligning at least one of the first and second fiducials of the tenth sacrificial edge with at least one of the first second fiducials of the thirteenth sacrificial edge; aligning at least one of the first and second fiducials of the ninth sacrificial edge with at least one of the first second fiducials of the fourteenth sacrificial edge; and, aligning at least one of the first and second fiducials of the twelfth sacrificial edge with at least one of the first second fiducials of the fourteenth sacrificial edge; and, bonding the seventh sensor chip to the substrate. 7 . The method of claim 6 further comprising: forming a eighth sensor chip of the plurality of sensor chips, the eighth sensor chip comprising a fifteenth sacrificial edge comprising a first fiducial and a second fiducial; performing at least one of the following steps of aligning: aligning at least one of the first and second fiducials of the second sacrificial edge with at least one of the first second fiducials of the fifteenth sacrificial edge; and, aligning at least one of the first and second fiducials of the thirteenth sacrificial edge with at least one of the first second fiducials of the fifteenth sacrificial edge; and, bonding the eighth sensor chip to the substrate. 8 . The method of claim 7 further comprising: forming a ninth sensor chip of the plurality of sensor chips, the ninth sensor chip comprising a sixteenth sacrificial edge and a seventeenth sacrificial edge, each of the sixteenth and seventeenth sacrificial edges comprises a first fiducial and a second fiducial; performing at least one of the following steps of aligning: aligning at least one of the first and second fiducials of the fourth sacrificial edge with at least one of the first second fiducials of the sixteenth sacrificial edge; aligning at least one of the first and second fiducials of the seventh sacrificial edge with at least one of the first second fiducials of the sixteenth sacrificial edge; aligning at least one of the first and second fiducials of the fourteenth sacrificial edge with at least one of the first second fiducials of the sixteenth sacrifi

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What does patent US2018337208A1 cover?
A sensor chip formed from a plurality of sensor chips fabricated on a wafer, the wafer including a top surface, a bottom surface opposite the top surface and a thickness between the top and bottom surfaces, the sensor chip including an active area formed on the top surface, a first sacrificial edge including a first fiducial and a second fiducial, and a first score line formed in a first portio…
Who is the assignee on this patent?
Xerox Corp
What technology area does this patent fall under?
Primary CPC classification H01L27/14632. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Nov 22 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).