Control of p-contact resistance in a semiconductor light emitting device

Patent metadata

Field	Value
Publication number	US-2018294379-A1
Application number	US-201816000510-A
Country	US
Kind code	A1
Filing date	Jun 5, 2018
Priority date	Jan 24, 2013
Publication date	Oct 11, 2018
Grant date	—

Abstract

A device according to embodiments of the invention includes a semiconductor structure including a light emitting layer disposed between an n-type region and a p-type region. A surface of the p-type region perpendicular to a growth direction of the semiconductor structure includes a first portion and a second portion. The first portion is less conductive than the second portion. The device further includes a p-contact formed on the p-type region. The p-contact includes a reflector and a blocking material. The blocking material is disposed over the first portion and no blocking material is disposed over the second portion.

First claim

What is claimed is:

1 . A method comprising:
partially activating the p-type region in a III-nitride structure comprising a light emitting layer disposed between an n-type region and a p-type region; after partially activating the p-type region, forming a metal p-contact on the p-type region, the metal p-contact comprising:
a reflective first metal; and
a second metal; and
after forming the metal p-contact, further activating the p-type region.

2 . The method of claim 1 , wherein the first metal is disposed between the second metal and the p-type region.

3 . The method of claim 2 , wherein the metal p-contact further comprises a third metal and the first and second metals are disposed between the third metal and the p-type region.

4 . The method of claim 3 , wherein the third metal is disposed above a first portion of the p-type region that is of lower conductivity.

5 . The method of claim 3 , wherein the third metal prevents material disposed beneath the third metal from being oxidized.

6 . The method of claim 3 , further comprising removing the second metal and the third metal by selective etch.

7 . The method of claim 1 , wherein the first metal is embedded in the second metal.

8 . The method of claim 7 , wherein the metal p-contact further comprises a third metal and the first and second metals are disposed between the third metal and the p-type region.

9 . The method of claim 8 , wherein the third metal is disposed above a first portion of the p-type region that is of lower conductivity.

10 . The method of claim 8 , wherein the third metal prevents material disposed beneath the third metal from being oxidized.

11 . The method of claim 8 , further comprising removing the third metal by selective etch.

12 . A device comprising:
a semiconductor structure comprising a light emitting layer disposed between an n-type region and a p-type region, wherein a surface of the p-type region comprises a first portion and a second portion, wherein the surface is perpendicular to a growth direction of the semiconductor structure, wherein the first portion is less conductive than the second portion; and a p-contact formed on the p-type region, the p-contact comprising:
a reflective first metal; and
a second metal,
the first metal being embedded in the second metal.

13 . The device of claim 12 , wherein the metal p-contact further comprises a third metal and the first and second metals are disposed between the third metal and the p-type region.

14 . The device of claim 13 , wherein the third metal is disposed above a first portion of the p-type region that is of lower conductivity.

15 . A device comprising:
a semiconductor structure comprising a light emitting layer disposed between an n-type region and a p-type region, wherein a surface of the p-type region comprises a first portion and a second portion, wherein the surface is perpendicular to a growth direction of the semiconductor structure, wherein the first portion is less conductive than the second portion; and a p-contact formed on the p-type region, the p-contact comprising:
a reflective first metal; and
a second metal,
the first metal being disposed between the second metal and the p-type region.

16 . The device of claim 15 , wherein the metal p-contact further comprises a third metal and the first and second metals are disposed between the third metal and the p-type region.

17 . The device of claim 16 , wherein the third metal is disposed above a first portion of the p-type region that is of lower conductivity.

Assignees

• Lumileds Llc

Inventors

• Choy Kwong-Hin Henry

Classifications

• H10P14/3444

  P-type · CPC title

• H10P14/3416

  Nitrides · CPC title

• H10P14/38

  characterised by treatments done after the formation of the materials · CPC title

• H10P95/904

  of Group III-V semiconductors · CPC title

• H10P95/408

  of Group III-V semiconductors, e.g. to render them semi-insulating · CPC title