Low overhead exclusive control for shared memory objects

Patent metadata

Field	Value
Publication number	US-2018293188-A1
Application number	US-201715800863-A
Country	US
Kind code	A1
Filing date	Nov 1, 2017
Priority date	Apr 5, 2017
Publication date	Oct 11, 2018
Grant date	—

Abstract

A computer-implemented method is provided for exclusive control of shared memory objects. The method computer-implemented includes transmitting and performing a plurality of accesses to the shared memory objects from local and remote locations via read requests and write requests made to a memory, and controlling the read and write requests by a memory controller including a read queue, a write queue, and a lock address list. The computer-implemented method further includes initiating each read request to the memory via the memory controller whatever the corresponding lock bit is, initiating each write request to the memory from the recently read location via the memory controller when the corresponding lock bit is enabled, otherwise notify the requesting local or remote locations as incomplete, and enabling and disabling the corresponding lock bit after the initiation of the read and write requests to the memory, respectively.

First claim

1 . A computer-implemented method for exclusive control of shared memory objects, the method comprising:
transmitting and performing a plurality of accesses to the shared memory objects from local and remote locations via read requests and write requests made to a memory; controlling the read and write requests by a memory controller including a read queue, a write queue, and a lock address list, each slot of the lock address list associated with a lock bit; initiating each read request to the memory via the memory controller whatever the corresponding lock bit is; initiating each write request to the memory from the recently read location via the memory controller when the corresponding lock bit is enabled, otherwise notify the requesting local or remote locations as incomplete; and enabling and disabling the corresponding lock bit after the initiation of the read and write requests to the memory, respectively.

2 . The method of claim 1 , wherein exclusive access controls with states and queues are handled near the memory.

3 . The method of claim 2 , wherein the exclusive access controls are for inter-node and intra-node communications.

4 . The method of claim 1 , wherein the memory controller arbitrates local and remote locations more equally.

5 . The method of claim 1 , wherein read-write constraints for multiple access is handled locally.

6 . The method of claim 1 , wherein the lock bits are segmented according to the memory controller's access granularity.

7 . The method of claim 1 , wherein memory-based protocols executed by the memory controller are supported for IO memory access architectures such as Remote Direct Memory Access (RDMA).

8 . A computer-implemented method for exclusive control of shared memory objects, the method comprising:
transmitting and performing a plurality of accesses to the shared memory objects from local and remote locations via read requests and write requests made to a memory; controlling the read and write requests by a memory controller including a read queue, a write queue, and a lock address list, each slot of the lock address list associated with a lock bit; initiating each read request to the memory via the memory controller when the corresponding lock bits are disabled; initiating each write request to the memory from the recently read location via the memory controller when the corresponding lock bits are enabled; and enabling and disabling the lock bits after the initiation of the read and write requests, respectively.

9 . The method of claim 8 , wherein exclusive access controls with states and queues are handled near the memory.

10 . The method of claim 9 , wherein the exclusive access controls are for inter-node and intra-node communications.

11 . The method of claim 8 , wherein the memory controller arbitrates local and remote locations more equally.

12 . The method of claim 8 , wherein read-write constraints for multiple access is handled locally.

13 . The method of claim 8 , wherein the lock bits are segmented according to the memory controller's access granularity.

14 . The method of claim 8 , wherein memory-based protocols executed by the memory controller are supported for IO memory access architectures such as Remote Direct Memory Access (RDMA).

Assignees

• IBM

Inventors

• Katayama Yasunao

Classifications

• G06F9/52

  Program synchronisation; Mutual exclusion, e.g. by means of semaphores · CPC title

• G06F13/1663

  Access to shared memory · CPC title

• G06F13/1642

  with request queuing · CPC title

• G06F13/28

  using burst mode transfer, e.g. direct memory access {DMA}, cycle steal (G06F13/32 takes precedence) · CPC title

• G06F9/526

  Mutual exclusion algorithms · CPC title