Methods for defect validation

US2018173104A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2018173104-A1
Application numberUS-201615580515-A
CountryUS
Kind codeA1
Filing dateMay 25, 2016
Priority dateJun 16, 2015
Publication dateJun 21, 2018
Grant date

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Abstract

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A method of defect validation for a device manufacturing process, the method including: obtaining a first image of a pattern processed into an area on a substrate using the device manufacturing process under a first condition; obtaining a metrology image from the area; aligning the metrology image and the first image; and determining from the first image and the metrology image whether the area contains a defect, based on one or more classification criteria.

First claim

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1 . A method of defect validation for a device manufacturing process, the method comprising: obtaining a first image of a pattern processed into an area on a substrate using the device manufacturing process under a first condition; obtaining a metrology image from the area; aligning the metrology image and the first image; and determining, by a hardware computer system, from the first image and the metrology image whether the area contains a defect, based on one or more classification criteria. 2 . The method of claim 1 , further comprising, responsive to the area containing a defect, reworking or discarding the substrate. 3 . The method of claim 1 , further comprising obtaining a second image of the pattern processed into the area using the device manufacturing process under a second condition, and determining the one or more classification criteria at least from the first and second images. 4 . The method of claim 3 , wherein the first and second images are one or more selected from a resist image, an image formed by etching, and/or an image formed by deposition. 5 . The method of claim 3 , wherein the first image or the second image contains one or more contours. 6 . The method of claim 3 , wherein the pattern processed under the first condition is not a defect and the pattern processed under the second condition is a defect. 7 . The method of claim 3 , wherein the first image and/or the second image is simulated. 8 . The method of claim 1 , wherein obtaining the metrology image comprises obtaining the metrology image by a scanning electron microscope or an optical imaging tool. 9 . The method of claim 1 , wherein aligning the metrology image and the first image comprises matching a contour in the metrology image and a contour in the first image. 10 . The method of claim 1 , wherein identifying the area that may contain a defect comprises: determining a condition under which a pattern is or will be processed into the area; obtaining a process window of the pattern; and responsive to the condition falling outside the process window, the area is identified as an area that may have a defect. 11 . The method of claim 1 , wherein identifying the area that may contain a defect comprises: simulating an image of a pattern processed, or that will be processed, into the area; measuring one or more parameters of the image; and identifying whether the area may have a defect based on the one or more parameters. 12 . The method of claim 1 , wherein the one or more classification criteria comprise whether a difference between two images is greater than a difference between the first image and a second image of the pattern processed into the area using the device manufacturing process under a second condition, or wherein the one or more classification criteria comprise whether a difference between contours in two images is greater than a difference between contours in the first image and a second image of the pattern processed into the area using the device manufacturing process under a second condition, or wherein the one or more classification criteria comprise whether a classifier classifies two images into different categories. 13 . The method of claim 1 , further comprising, responsive to the area containing a defect, verifying the defect. 14 . A method of defect validation for a device manufacturing process, the method comprising: obtaining a first image of a pattern processed using a device manufacturing process under a first condition; obtaining a second image of the pattern processed using the device manufacturing process under a second condition, different from the first condition; determining one or more classification criteria at least from the first image and the second image; obtaining a metrology image from an area on a substrate, the metrology image containing the pattern; and determining, by a hardware computer system, from the first image and the metrology image whether the area contains a defect, based on the one or more classification criteria. 15 . A computer program product comprising a computer readable medium having instructions recorded thereon, the instructions when executed configured to cause a computer to at least: obtain a first image of a pattern processed into an area on a substrate using a device manufacturing process under a first condition; obtain a metrology image from the area; align the metrology image and the first image; and determine from the first image and the metrology image whether the area contains a defect, based on one or more classification criteria. 16 . The computer program product of claim 15 , wherein the instructions are further configured to cause the computer to obtain a second image of the pattern processed into the area using the device manufacturing process under a second condition, and determine the one or more classification criteria at least from the first and second images. 17 . The computer program product of claim 16 , wherein the pattern processed under the first condition is not a defect and the pattern processed under the second condition is a defect. 18 . The computer program product of claim 15 , wherein the instructions configured to identify the area that may contain a defect are further configured to cause the computer to: determine a condition under which a pattern is or will be processed into the area; obtain a process window of the pattern; and responsive to the condition falling outside the process window, the area is identified as an area that may have a defect. 19 . The computer program product of claim 15 , wherein the instructions configured to identify the area that may contain a defect are further configured to cause the computer to: simulate an image of a pattern processed, or that will be processed, into the area; obtain measurements of one or more parameters of the image; and identify whether the area may have a defect based on the one or more parameters. 20 . The computer program product of claim 15 , wherein the one or more classification criteria comprise whether a difference between two images is greater than a difference between the first image and a second image of the pattern processed into the area using the device manufacturing process under a second condition, or wherein the one or more classification criteria comprise whether a difference between contours in two images is greater than a difference between contours in the first image and a second image of the pattern processed into the area using the device manufacturing process under a second condition, or wherein the one or more classification criteria comprise whether a classifier classifies two images into different categories.

Assignees

Inventors

Classifications

  • G03F7/7065Primary

    Defects, e.g. optical inspection of patterned layer for defects · CPC title

  • using an image reference approach · CPC title

  • Semiconductor; IC; Wafer · CPC title

  • Physics · mapped topic

  • Transformations for image registration, e.g. adjusting or mapping for alignment of images · CPC title

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What does patent US2018173104A1 cover?
A method of defect validation for a device manufacturing process, the method including: obtaining a first image of a pattern processed into an area on a substrate using the device manufacturing process under a first condition; obtaining a metrology image from the area; aligning the metrology image and the first image; and determining from the first image and the metrology image whether the area…
Who is the assignee on this patent?
Asml Netherlands Bv
What technology area does this patent fall under?
Primary CPC classification G03F7/7065. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Jun 21 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).