Thin-layer capacitors with large scale integration
US-2015380168-A1 · Dec 31, 2015 · US
Capacitor and method for manufacturing the same
US2018158611A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2018158611-A1 |
| Application number | US-201815888389-A |
| Country | US |
| Kind code | A1 |
| Filing date | Feb 5, 2018 |
| Priority date | Aug 12, 2015 |
| Publication date | Jun 7, 2018 |
| Grant date | — |
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- Title
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Abstract
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A capacitor that includes a conductive porous base material having a porous portion; a dielectric layer on the porous portion; and an upper electrode on the dielectric layer. In the porous portion of the conductive porous base material, a portion having a base material thickness between pores of 1.2 times or less of a thickness of the dielectric layer exits in 5% or more of the entire porous portion, and the dielectric layer is formed from a compound including atoms having an origin different from an origin of the conductive porous base material.
First claim
Opening claim text (preview).
1 . A capacitor comprising: a conductive porous base material having a porous portion; a dielectric layer on the porous portion; and an upper electrode on the dielectric layer, wherein in the porous portion of the conductive porous base material, a portion thereof having a base material thickness between pores of 1.2 times or less of a thickness of the dielectric layer exits in 5% or more of the entire porous portion, and the dielectric layer is formed from a compound including atoms having an origin different from an origin of the conductive porous base material. 2 . The capacitor according to claim 1 , wherein the portion having the base material thickness between pores of 1.2 times or less of the thickness of the dielectric layer is 15% or more. 3 . The capacitor according to claim 1 , wherein the portion having the base material thickness between pores of 1.2 times or less of the thickness of the dielectric layer is 25% or more. 4 . The capacitor according to claim 1 , wherein an existing proportion of the base material is 17% or more in the porous portion of the conductive porous base material. 5 . The capacitor according to claim 1 , wherein the dielectric layer is a gas phase-formed dielectric layer or a supercritical fluid-formed dielectric layer. 6 . The capacitor according to claim 1 , wherein the dielectric layer is an atomic layer deposited dielectric layer. 7 . A capacitor comprising: a conductive porous base material having a porous portion; a dielectric layer on the porous portion; and an upper electrode on the dielectric layer, wherein in the porous portion of the conductive porous base material, a portion thereof having a base material thickness between pores of 50 nm or less exits in 5% or more of the entire porous portion, and the dielectric layer is formed from a compound including atoms having an origin different from an origin of the conductive porous base material. 8 . The capacitor according to claim 7 , wherein the portion having the base material thickness between pores of 50 nm or less is 15% or more. 9 . The capacitor according to claim 7 , wherein the portion having the base material thickness between pores of 50 nm or less is 25% or more. 10 . The capacitor according to claim 7 , wherein an existing proportion of the base material is 17% or more in the porous portion of the conductive porous base material. 11 . The capacitor according to claim 7 , wherein the dielectric layer is formed a gas phase-deposited dielectric layer or a supercritical fluid-deposited dielectric layer. 12 . The capacitor according to claim 7 , wherein the dielectric layer is an atomic layer deposited dielectric layer. 13 . A method for manufacturing a capacitor, the method comprising: preparing a conductive porous base material having a porous portion; forming a dielectric layer on the porous portion of the conductive porous base material without oxidizing the base material; and forming an upper electrode on the dielectric layer, wherein in preparing the conductive porous base material, a material is used in which a portion of the porous portion has a base material thickness between pores of 1.2 times or less of a thickness of the dielectric layer to be formed exits in 5% or more of the entire porous portion. 14 . The method for manufacturing a capacitor according to claim 13 , wherein the dielectric layer is formed by an atomic layer deposition method. 15 . The method for manufacturing a capacitor according to claim 13 , wherein the portion of the porous portion having the base material thickness between pores of 1.2 times or less of the thickness of the dielectric layer to be formed is 15% or more. 16 . The method for manufacturing a capacitor according to claim 13 , wherein the portion of the porous portion having the base material thickness between pores of 1.2 times or less of the thickness of the dielectric layer to be formed is 25% or more. 17 . A method for manufacturing a capacitor, the method comprising: preparing a conductive porous base material having a porous portion; forming a dielectric layer on the porous portion of the conductive porous base material without oxidizing the base material; and forming an upper electrode on the dielectric layer, wherein in preparing the conductive porous base material, a material is used in which a portion of the porous portion having a base material thickness between pores of 50 nm or less exits in 5% or more of the entire porous portion. 18 . The method for manufacturing a capacitor according to claim 17 , wherein the dielectric layer is formed by an atomic layer deposition method. 19 . The method for manufacturing a capacitor according to claim 17 , wherein the portion of the porous portion having the base material thickness between pores of 50 nm or less is 15% or more. 20 . The method for manufacturing a capacitor according to claim 17 , wherein the portion of the porous portion having the base material thickness between pores of 50 nm or less is 25% or more.
Assignees
Inventors
Classifications
Solid electrolytic capacitors (H01G11/00 takes precedence) · CPC title
formation of the dielectric layer · CPC title
Dielectric layers · CPC title
Ceramic dielectrics {(H01G4/085 takes precedence)} · CPC title
- H01G4/06Primary
Solid dielectrics · CPC title
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Frequently asked questions
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- What does patent US2018158611A1 cover?
- A capacitor that includes a conductive porous base material having a porous portion; a dielectric layer on the porous portion; and an upper electrode on the dielectric layer. In the porous portion of the conductive porous base material, a portion having a base material thickness between pores of 1.2 times or less of a thickness of the dielectric layer exits in 5% or more of the entire porous po…
- Who is the assignee on this patent?
- Murata Manufacturing Co
- What technology area does this patent fall under?
- Primary CPC classification H01G4/06. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Thu Jun 07 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).