Thin film type capacitor element and method of manufacturing the same

US2015380167A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2015380167-A1
Application numberUS-201514742355-A
CountryUS
Kind codeA1
Filing dateJun 17, 2015
Priority dateJun 25, 2014
Publication dateDec 31, 2015
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Disclosed herein is a thin film type capacitor element, including: a body part formed by stacking a plurality of dielectric layers; a first internal electrode provided in the body part and including a first non-plated region; a second internal electrode including a second non-plated region; a first via formed in the first non-plated region; and a second via formed in the second non-plated region.

First claim

Opening claim text (preview).

What is claimed is: 1 . A thin film type capacitor element, comprising: a body part formed by stacking a plurality of dielectric layers; a first internal electrode stacked between the dielectric layers and including a first non-plated region; a second internal electrode stacked between the dielectric layers and including a second non-plated region; a first via formed in the first non-plated region and penetrating through the second internal electrode and the dielectric layer; and a second via formed in the second non-plated region and penetrating through the first internal electrode and the dielectric layer. 2 . The thin film type capacitor element according to claim 1 , wherein the first non-plated region and the second non-plated region are formed at positions that are not overlapped with each other. 3 . The thin film type capacitor element according to claim 1 , wherein the first non-plated region is formed at an edge of the first internal electrode. 4 . The thin film type capacitor element according to claim 1 , wherein the second non-plated region is formed at an edge of the second internal electrode. 5 . The thin film type capacitor element according to claim 1 , wherein the first non-plated region and the second non-plated region are disposed at positions that are opposite to each other. 6 . The thin film type capacitor element according to claim 5 , wherein the first non-plated region and the second non-plated region are symmetrical with each other in a horizontal or vertical direction. 7 . The thin film type capacitor element according to claim 5 , wherein the first non-plated region and the second non-plated region are symmetrical with each other in a diagonal direction. 8 . The thin film type capacitor element according to claim 1 , wherein the first and second non-plated regions are formed in a shape of a quadrangular shape, a triangular shape, or a circular shape. 9 . The thin film type capacitor element according to claim 1 , wherein an area of the first non-plated region has a minimum value within a range that is larger than a horizontal cross-section area of the first via, and an area of the second non-plated region has a minimum value within a range that is larger than a horizontal cross-section area of the second via. 10 . The thin film type capacitor element according to claim 1 , wherein the first non-plated region and the second non-plated region are formed in the same shape as each other. 11 . A method of manufacturing a thin film type capacitor element, the method comprising: forming a body part by alternately stacking a first internal electrode including a first non-plated region and a second internal electrode including a second non-plated region while having a dielectric layer therebetween; forming a first via hole penetrating through the body part in a vertical direction in the first non-plated region and a second via hole penetrating through the body part in the vertical direction in the second non-plated region; and forming a first via by plating an inner portion of the first via hole and forming a second via by plating an inner portion of the second via hole. 12 . The method according to claim 11 , wherein in the forming of the first internal electrode, a first mask including a frame part and a plating prevention part having a shape corresponding to the first non-plated region is disposed on the dielectric layer and a metal material is then deposited thereon by a thin film process; and, wherein in the forming of the second internal electrode, a second mask including a frame part and a plating prevention part having a shape corresponding to the second non-plated region is disposed on the dielectric layer and a metal material is then deposited thereon by a thin film process. 13 . The method according to claim 12 , wherein a plating prevention part of a first mask and a plating prevention part of a second mask are provided to positions that are opposite to each other. 14 . The method according to claim 13 , wherein the plating prevention part of the first mask and the plating prevention part of the second mask are symmetrical with each other in a horizontal or vertical direction. 15 . The method according to claim 13 , wherein the plating prevention part of the first mask and the plating prevention part of the second mask are symmetrical with each other in a diagonal direction.

Assignees

Inventors

Classifications

  • characterised by the material of the terminals · CPC title

  • electrically connecting two or more layers of a stacked or rolled capacitor · CPC title

  • Stacked capacitors (H01G4/33 takes precedence) · CPC title

  • H01G4/012Primary

    Form of non-self-supporting electrodes · CPC title

  • Electrodes · CPC title

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Frequently asked questions

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What does patent US2015380167A1 cover?
Disclosed herein is a thin film type capacitor element, including: a body part formed by stacking a plurality of dielectric layers; a first internal electrode provided in the body part and including a first non-plated region; a second internal electrode including a second non-plated region; a first via formed in the first non-plated region; and a second via formed in the second non-plated region.
Who is the assignee on this patent?
Samsung Electro Mech
What technology area does this patent fall under?
Primary CPC classification H01G4/012. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Dec 31 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).