Method and device for self-biased and self-regulated common-mode amplification

Patent metadata

Field	Value
Publication number	US-2018152142-A1
Application number	US-201715589814-A
Country	US
Kind code	A1
Filing date	May 8, 2017
Priority date	Nov 29, 2016
Publication date	May 31, 2018
Grant date	—

Abstract

An amplification device includes an amplification stage having a transconductance amplification transistor and an output terminal. A biasing circuit is configured to bias in common mode the output terminal to a bias potential obtained on the basis of a voltage present between the gate and the source of the amplification transistor, and to compensate for parasitic variations of the voltage present between the gate and the source of the amplification transistor.

First claim

What is claimed is:

1 . A method of common-mode biasing of an output terminal of an amplification stage that comprises a transconductance amplification transistor, the method comprising:
biasing the output terminal to a bias potential that is based on a gate-source voltage present between a gate and a source of the amplification transistor and on a compensation of parasitic variations of the gate-source voltage.

2 . The method according to claim 1 , wherein the compensation is based on a compensation current flowing in a resistor connected between the gate of the amplification transistor and the output terminal, the compensation current generating a compensation voltage across terminals of the resistor.

3 . The method according to claim 1 , wherein the amplification stage comprises a first cascoded amplification arrangement that comprises the amplification transistor and a second cascoded amplification arrangement in series and sharing the output terminal with a controlled common mode, the second cascoded amplification arrangement having transistors of a conductivity type opposite to a conductivity type of transistors of the first cascoded amplification arrangement, the method further comprising regulating a static current flowing in the first and second cascoded amplification arrangements.

4 . An amplification device comprising:
an amplification stage having a transconductance amplification transistor and an output terminal; and a biasing circuit configured to bias, in common mode, the output terminal to a bias potential based on a gate-source voltage present between a gate and a source of the amplification transistor, the gate-source voltage being compensated for parasitic variations.

5 . The device according to claim 4 , wherein the biasing circuit is configured to pass a compensation current through a first resistor connected between the gate of the amplification transistor and the output terminal, the voltage generated across terminals of the first resistor being intended to compensate the parasitic variations.

6 . The device according to claim 5 , wherein the biasing circuit comprises a compensation transistor paired with the amplification transistor of the compensation transistor being connected to a terminal intended to receive a fixed control voltage, and being configured to generate the compensation current at a drain thereof.

7 . The device according to claim 6 , wherein the biasing circuit comprises a second resistor connected between a source of the compensation transistor and the source of the amplification transistor.

8 . The device according to claim 7 , wherein the amplification stage comprises a third resistor connected between a supply terminal intended to receive a supply voltage and the source of the amplification transistor.

9 . The device according to claim 6 , wherein the biasing circuit comprises a current generator connected between the drain of the compensation transistor and a terminal intended to receive a reference voltage, the current generator configured to subtract an adjustment current from the compensation current.

10 . The device according to claim 4 , wherein the amplification stage comprises a resistor connected between a supply terminal intended to receive a supply voltage and the source of the amplification transistor.

11 . The device according to claim 4 , wherein the amplification stage comprises a first input on the gate of the amplification transistor and coupled to an input terminal by a filtering capacitor that is configured to behave as a short-circuit at an operating frequency of the amplification stage and as a circuit breaker at an operating frequency of the biasing circuit.

12 . The device according to claim 11 , further comprising a current-feedback-control loop configured to regulate a current flowing in the amplification stage.

13 . A radio frequency communication system comprising a reception stage that includes an antenna input, the reception stage comprising an amplification device according to claim 4 configured to amplify a reception signal, and a signal processor configured to process the amplified reception signal.

14 . The system according to claim 13 , further comprising an antenna coupled to the antenna input of the reception stage.

15 . The system according to claim 14 , wherein the radio frequency communication system is part of a personal computer.

16 . The system according to claim 14 , wherein the radio frequency communication system is part of a mobile telephone.

17 . An amplification device comprising:
a reference voltage terminal; an output terminal; a transconductance amplification transistor having a current path between the reference voltage terminal and the output terminal; a resistor coupled between a gate of the amplification transistor and the output terminal; and a compensation transistor having a current path coupled between the reference voltage terminal and a node that is connected to both the gate of the amplification transistor and a terminal of the resistor.

18 . The device according to claim 17 , wherein a gate of the compensation transistor is coupled to a fixed control voltage terminal.

19 . The device according to claim 17 , further comprising a second resistor coupled between a source of the compensation transistor and the source of the amplification transistor.

20 . The device according to claim 19 , further comprising a third resistor connected between the reference voltage terminal and the source of the amplification transistor.

21 . The device according to claim 17 , further comprising a current generator having a current path coupled between a drain of the compensation transistor and ground terminal.

Assignees

• St Microelectronics Grenoble 2

Inventors

• Ayraud Michel
• Nicolas Sandrine

Classifications

• H03F2200/129

  there being a feedback over the complete amplifier · CPC title

• H03F1/223

  with MOSFET's · CPC title

• H03F3/193

  with field-effect devices (H03F3/195 takes precedence) · CPC title

• H03F1/0205 Primary

  in transistor amplifiers · CPC title

• H03F2200/451

  the amplifier being a radio frequency amplifier · CPC title