Pixel Circuit, Method For Driving The Same, OLED Panel, And Display Device

Patent metadata

Field	Value
Publication number	US-2018151123-A1
Application number	US-201815864731-A
Country	US
Kind code	A1
Filing date	Jan 8, 2018
Priority date	Jul 31, 2017
Publication date	May 31, 2018
Grant date	—

Abstract

Disclosed are a pixel circuit and method for driving the same, an organic light emitting display panel and a display device. Prior to the data signal is written into the control electrode of the driving transistor, a unified common voltage signal is input to the first electrode of the driving transistor. The common voltage signal, along with a threshold voltage of the driving transistor, is written into the control electrode of the driving transistor. It can be ensured that each time the data signal is written to the control electrode of the driving transistor, voltages of the control electrode and the first electrode of the driving transistor can jump by a unified potential, so as to avoid the variation of the voltage change in the control electrode which came as a result of the parasitic capacitance between the control electrode and the first electrode of the driving transistor.

First claim

What is claimed is:

1 . A pixel circuit, comprising:
a voltage writing module; an initialization module; a compensation control module; a light emitting control module; a driving transistor; and a light emitting element; wherein the voltage writing module is connected to a first control signal terminal, a second control signal terminal, a common voltage signal terminal, a data signal terminal and a first electrode of the driving transistor respectively, and is configured to provide a common voltage signal from the common voltage signal terminal to the first electrode of the driving transistor, under control of a signal of the first control signal terminal, to provide a data signal from the data signal terminal to the first electrode of the driving transistor under control of a signal of the second control signal terminal, wherein a voltage of the data signal is not less than that of the common voltage signal; wherein the initialization module is connected to a first scan signal terminal, a reference signal terminal and the driving transistor respectively, and is configured to initialize the driving transistor under control of a signal of the first scan signal terminal; wherein the compensation control module is connected to a second scan signal terminal, a control electrode of the driving transistor, and a second electrode of the driving transistor respectively, and is configured to connect the control electrode of the driving transistor to the second electrode of the driving transistor under control of a signal of the second scan signal terminal; and wherein the light emitting control module is connected to a light emitting control signal terminal, a first power supply terminal, a first electrode of the driving transistor, a second electrode of the driving transistor and a first terminal of the light emitting element respectively, and is configured to drive the light emitting element through the driving transistor under control of a signal of the light emitting control signal terminal.

2 . The pixel circuit according to claim 1 , wherein the voltage writing module comprises a first transistor and a second transistor;
wherein the first transistor has a control electrode connected to the first control signal terminal, and wherein a first electrode connected to the common voltage signal terminal, and wherein a second electrode connected to the first electrode of the driving transistor; and wherein the second transistor has a control electrode connected to the second control signal terminal, wherein a first electrode is connected to the data signal terminal, and wherein a second electrode connected to the first electrode of the driving transistor.

3 . The pixel circuit according to claim 2 , wherein the first control signal terminal and the second control signal terminal share a same signal terminal; and
wherein the first transistor is a P-type transistor, the second transistor is a N-type transistor; or wherein the first transistor is a N-type transistor, the second transistor is a P-type transistor.

4 . The pixel circuit according to claim 3 , wherein the voltage writing module further comprises a third transistor; and wherein the second electrode of the second transistor is connected to the first electrode of the driving transistor via the third transistor; and
wherein the third transistor comprises a control electrode connected to the second scan signal terminal, a first electrode connected to the second electrode of the second transistor, and a second electrode connected to the first electrode of the driving transistor.

5 . The pixel circuit according to claim 1 , wherein the initialization module comprises a fourth transistor;
wherein the fourth transistor comprises a control electrode connected to the first scan signal terminal, a first electrode connected to the reference signal terminal, and a second electrode connected to the control electrode of the driving transistor.

6 . The pixel circuit according to claim 5 , wherein the fourth transistor is in a double-gate structure, wherein the fourth transistor comprises a first sub-transistor and a second sub-transistor connected in series; and wherein a connection node between the first sub-transistor and the second sub-transistor is connected to the first electrode of the driving transistor.

7 . The pixel circuit according to claim 1 , wherein the compensation control module comprises a fifth transistor and a storage capacitor;
wherein the fifth transistor comprises a control electrode connected to the second scan signal terminal, a first electrode connected to the control electrode of the driving transistor, and a second electrode connected to the second electrode of the driving transistor; and wherein the storage capacitor has a first terminal connected to the first power supply terminal and a second terminal connected to the control electrode of the driving transistor.

8 . The pixel circuit according to claim 7 , wherein the fifth transistor is in a double-gate structure, which comprises a third sub-transistor and a fourth sub-transistor connected in series.

9 . The pixel circuit according to claim 1 , wherein the light emitting control module comprises a sixth transistor and a seventh transistor;
wherein the sixth transistor comprises a control electrode connected to the light emitting control signal terminal, a first electrode connected to the first power supply terminal, and wherein a second electrode is connected to the first electrode of the driving transistor; and wherein the seventh transistor comprises a control electrode connected to the light emitting control signal terminal, a first electrode connected to the second electrode of the driving transistor, and a second electrode connected to the first terminal of the light emitting element.

10 . The pixel circuit according to claim 1 , wherein the pixel circuit further comprises an anode resetting module;
wherein the anode resetting module is connected to a third scan signal terminal, the reference signal terminal and a first terminal of the light emitting element, and is configured to reset the first terminal of the light emitting element under control of a signal of the third scan signal terminal.

11 . The pixel circuit according to claim 10 , wherein the anode resetting module comprises an eighth transistor;
wherein the eighth transistor comprises a control electrode connected to the third scan signal terminal, a first electrode connected to the reference signal terminal, a second electrode connected to the first terminal of the light emitting element.

12 . The pixel circuit according to claim 10 , wherein:
the third scan signal terminal and the first scan signal terminal share a same signal terminal; or the third scan signal terminal and the second scan signal terminal share a same signal terminal; or the third scan signal terminal and the first control signal terminal share a same signal terminal; or the third scan signal terminal and the second control signal terminal share a same signal terminal; or the third scan signal terminal and the light emitting control signal terminal share a same signal terminal.

13 . An organic light emitting display panel, comprising the pixel circuit according to claim 1 .

14 . A display device, comprising the organic light emitting display panel according to claim 13 .

15 . A method for driving the pixel circuit according to claim 1 , comprising:
an initialization stage, a common voltage writing stage, a data voltage writing stage and a light emitting stage; wherein in the initialization stage, providin

Assignees

• Shanghai Tianma Am Oled Co Ltd

Inventors

• Li Yue
• Zhu Renyuan
• Xiang Dongxu
• Gao Yana
• Chen Zeyuan
• Cai Zhonglan

Classifications

• G09G2320/0257

  Reduction of after-image effects · CPC title

• G09G2300/0861

  with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes · CPC title

• G09G3/3225 Primary

  using an active matrix · CPC title

• G09G2300/0819

  used for counteracting undesired variations, e.g. feedback or autozeroing · CPC title

• G09G2300/0842

  forming a memory circuit, e.g. a dynamic memory with one capacitor · CPC title