Dielectric-based waveguiding in a multi-layer pcb

Patent metadata

Field	Value
Publication number	US-2018115042-A1
Application number	US-201615331614-A
Country	US
Kind code	A1
Filing date	Oct 21, 2016
Priority date	Oct 21, 2016
Publication date	Apr 26, 2018
Grant date	—

Abstract

Embodiments herein describe a high-speed communication channel in a PCB that includes a dielectric waveguide sandwiched between two ground layers. The dielectric waveguide includes a core and a cladding where the material of the core has a higher dielectric constant than the material of the cladding. Thus, electromagnetic signals propagating in the core are internally reflected at the interface between the core and cladding such that the electromagnetic signals are primary contained in the core.

First claim

What is claimed is:

1 . A multi-layer printed circuit board (PCB), comprising:
a first dielectric layer; a first ground layer comprising a first conductive material; a dielectric waveguide layer comprising a first core and a cladding, wherein the cladding is disposed on at least two sides of the first core, and wherein an insulative material of the first core has a higher dielectric constant than an insulative material of the cladding; and a second ground layer comprising a second conductive material, wherein the first ground layer is disposed between the first dielectric layer and the dielectric waveguide layer, and wherein the first core and cladding both directly contact the first and second ground layers.

2 . The PCB of claim 1 , wherein the first core has a first end and a second end, wherein the first core has at least one curve when extending between the first and second ends in the dielectric waveguide layer.

3 . The PCB of claim 2 , wherein the at least one curve forms an arc with an arc radius that is equal to or greater than 25/π.

4 . The PCB of claim 1 , wherein the dielectric waveguide layer includes a second core extending in a common direction as the first core in the dielectric waveguide layer, wherein the cladding is disposed on at least two sides of the second core, and wherein an insulative material of the second core has a higher dielectric constant than the insulative material of the cladding,
wherein the second core directly contacts the first and second ground layers.

5 . The PCB of claim 4 , wherein a spacing between the first core and the second core in the dielectric waveguide layer is always greater than 1 mm.

6 . The PCB of claim 1 , wherein a width of the first core in a direction parallel to the first and second ground layers is between 0.1 to 2 mm and is configured to transmit electromagnetic signals with a frequency between 10 GHz to 150 GHz.

7 . The PCB of claim 1 , further comprising:
a plurality of dielectric layers that includes the first dielectric layer, wherein each of the plurality of dielectric layers is separated by one of a plurality of conductive ground layers, wherein the plurality of dielectric layers and the plurality of ground layers are disposed on the first ground layer.

8 . The PCB of claim 7 , wherein first and second coaxial vias extend through the plurality of dielectric layers and the plurality of ground layers to couple to respective ends of the first core, wherein the first and second coaxial vias each comprises a center conductor and an outer conductor surrounding the center conductor.

9 . The PCB of claim 8 , wherein the outer conductors of the first and second coaxial vias are electrically coupled to the plurality ground layers and the center conductors are electrically insulated from the plurality of ground layers.

10 . A communication system, comprising:
a multi-layer PCB, comprising:
a first dielectric layer,
a first ground layer comprising a first conductive material,
a dielectric waveguide layer comprising a first core and a cladding, wherein the cladding is disposed on at least two sides of the first core, and wherein an insulative material of the first core has a higher dielectric constant than an insulative material of the cladding, and
a second ground layer comprising a second conductive material, wherein the first ground layer is disposed between the first dielectric layer and the dielectric waveguide layer, and wherein the first core and cladding both directly contact the first and second ground layers;
a first application specific integrated circuit (ASIC) coupled to the multi-layered PCB, the first ASIC is configured to transmit an electromagnetic signal into the first core; and a second ASIC coupled to the multi-layered PCB, the second ASIC is configured to receive the electromagnetic signal from the first core.

11 . The communication system of claim 10 , wherein the first core has a first end and a second end, wherein the first core has at least one curve when extending between the first and second ends in the dielectric waveguide layer.

12 . The communication system of claim 11 , wherein the at least one curve forms an arc with an arc radius that is equal to or greater than 25/π.

13 . The communication system of claim 10 , wherein the dielectric waveguide layer includes a second core extending in a common direction as the first core in the dielectric waveguide layer, wherein the cladding is disposed on at least two sides of the second core, and wherein an insulative material of the second core has a higher dielectric constant than the insulative material of the cladding,
wherein the second core directly contacts the first and second ground layers.

14 . The communication system of claim 13 , wherein a spacing between the first core and the second core in the dielectric waveguide layer is always greater than 1 mm.

15 . The communication system of claim 10 , wherein a width of the first core in a direction parallel to the first and second ground layers is between 0.1 to 2 mm and is configured to transmit electromagnetic signals with a frequency between 10 GHz to 150 GHz between the first and second ASICs.

16 . The communication system of claim 10 , wherein the multi-layer PCB further comprises:
a plurality of dielectric layers that includes the first dielectric layer, wherein each of the plurality of dielectric layers is separated by one of a plurality of conductive ground layers, wherein the plurality of dielectric layers and the plurality of ground layers are disposed on the first ground layer.

17 . The communication system of claim 16 , wherein first and second coaxial vias extend through the plurality of dielectric layers and the plurality of ground layers, wherein the first and second coaxial vias each comprises a center conductor and an outer conductor surrounding the center conductor, and wherein a first end of the center conductors is coupled to one of the first and second ASICs and a second end of the center conductors is coupled to the first core.

18 . The communication system of claim 17 , wherein the outer conductors of the first and second coaxial vias are electrically coupled to the plurality ground layers and the center conductors are electrically insulated from the plurality of ground layers.

19 . The communication system of claim 17 , wherein the first and second ASICs are disposed on a same side of the multi-layer PCB that is parallel to the dielectric waveguide layer.

20 . The communication system of claim 17 , wherein the first and second ASICs are coupled to the first and second coaxial vias using respective solder bonds.

Assignees

• IBM

Inventors

• Connor Samuel R
• Dreps Daniel M
• Hejase Jose A
• Kuczynski Joseph
• Myers Joshua C
• Tang Junyan

Classifications

• H01P3/121

  integrated in a substrate · CPC title

• H05K1/0216

  Reduction of cross-talk, noise or electromagnetic interference (grounding H05K1/0215) · CPC title

• H05K1/024

  Dielectric details, e.g. changing the dielectric material around a transmission line · CPC title

• H05K1/0298

  Multilayer circuits · CPC title

• H05K1/0243

  Printed circuits associated with mounted high frequency components · CPC title