Semiconductor device

Patent metadata

Field	Value
Publication number	US-2018102741-A1
Application number	US-201715679203-A
Country	US
Kind code	A1
Filing date	Aug 17, 2017
Priority date	Apr 11, 2012
Publication date	Apr 12, 2018
Grant date	—

Abstract

Power consumption of a signal processing circuit is reduced. Further, power consumption of a semiconductor device including the signal processing circuit is reduced. The signal processing circuit includes a reference voltage generation circuit, a voltage divider circuit, an operational amplifier, a bias circuit for supplying bias current to the operational amplifier, and first and second holding circuits. The first holding circuit is connected between the reference voltage generation circuit and the bias circuit. The second holding circuit is connected between the voltage divider circuit and a non-inverting input terminal of the operational amplifier. Reference voltage from the reference voltage generation circuit and reference voltage from the voltage divider circuit can be held in the first and second holding circuits, respectively, so that the reference voltage generation circuit can stop operating. Thus, power consumption of the reference voltage generation circuit can be reduced.

First claim

1 . (canceled)

2 . A semiconductor device comprising:
a differential circuit; a bias circuit configured to supply a bias current to the differential circuit; a reference voltage generation circuit configured to output a reference voltage to the bias circuit; and a holding circuit configured to hold the reference voltage, wherein the holding circuit comprises a first transistor and a capacitor, wherein the first transistor comprises an oxide semiconductor film comprising a channel formation region, wherein one of a source and a drain of the first transistor is electrically connected to the reference voltage generation circuit, wherein the other of the source and the drain of the first transistor is electrically connected to the bias circuit, and wherein the capacitor is electrically connected to the other of the source and the drain of the first transistor.

3 . The semiconductor device according to claim 2 ,
wherein operating of the reference voltage generation circuit is stopped after the reference voltage is held in the holding circuit.

4 . A semiconductor device comprising:
a first transistor; a second transistor; a third transistor; a fourth transistor; a fifth transistor; a sixth transistor; and a capacitor, wherein a gate of the first transistor is electrically connected to a gate of the second transistor, wherein one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the third transistor, wherein one of a source and a drain of the second transistor is electrically connected to one of a source and a drain of the fourth transistor, wherein the other of the source and the drain of the third transistor is electrically connected to one of a source and a drain of the fifth transistor, wherein the other of the source and the drain of the fourth transistor is electrically connected to the one of the source and the drain of the fifth transistor, wherein one of a source and a drain of the sixth transistor is electrically connected to a gate of the fifth transistor, wherein the capacitor is electrically connected to the gate of the fifth transistor, wherein each of the first transistor, the second transistor, the third transistor and the fourth transistor comprises a channel formation region comprising silicon, and wherein the sixth transistor comprises an oxide semiconductor film comprising a channel formation region.

5 . The semiconductor device according to claim 4 ,
wherein the gate of the second transistor is electrically connected to the one of the source and the drain of the second transistor.

6 . The semiconductor device according to claim 4 ,
wherein a first power supply voltage is supplied to the other of the source and the drain of the first transistor, wherein the first power supply voltage is supplied to the other of the source and the drain of the second transistor, and wherein a second power supply voltage is supplied to the other of the source and the drain of the fifth transistor.

7 . The semiconductor device according to claim 4 ,
wherein a reference voltage is supplied to the gate of the fifth transistor through the sixth transistor.

8 . The semiconductor device according to claim 7 , further comprising a reference voltage generation circuit,
wherein the reference voltage generation circuit is configured to output the reference voltage.

9 . The semiconductor device according to claim 8 ,
wherein operating of the reference voltage generation circuit is stopped after the sixth transistor is turned off.

10 . A semiconductor device comprising:
a first transistor; a second transistor; a third transistor; a fourth transistor; a fifth transistor; a sixth transistor; a seventh transistor; a first capacitor; and a second capacitor, wherein a gate of the first transistor is electrically connected to a gate of the second transistor, wherein one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the third transistor, wherein one of a source and a drain of the second transistor is electrically connected to one of a source and a drain of the fourth transistor, wherein the other of the source and the drain of the third transistor is electrically connected to one of a source and a drain of the fifth transistor, wherein the other of the source and the drain of the fourth transistor is electrically connected to the one of the source and the drain of the fifth transistor, wherein one of a source and a drain of the sixth transistor is electrically connected to a gate of the fifth transistor, wherein the first capacitor is electrically connected to the gate of the fifth transistor, wherein one of a source and a drain of the seventh transistor is electrically connected to a gate of the third transistor, wherein the second capacitor is electrically connected to the gate of the third transistor, wherein each of the first transistor, the second transistor, the third transistor and the fourth transistor comprises a channel formation region comprising silicon, and wherein each of the sixth transistor and the seventh transistor comprises an oxide semiconductor film comprising a channel formation region.

11 . The semiconductor device according to claim 10 ,
wherein the gate of the second transistor is electrically connected to the one of the source and the drain of the second transistor.

12 . The semiconductor device according to claim 10 ,
wherein a first power supply voltage is supplied to the other of the source and the drain of the first transistor, wherein the first power supply voltage is supplied to the other of the source and the drain of the second transistor, and wherein a second power supply voltage is supplied to the other of the source and the drain of the fifth transistor.

13 . The semiconductor device according to claim 10 ,
wherein a reference voltage is supplied to the gate of the fifth transistor through the sixth transistor.

14 . The semiconductor device according to claim 13 , further comprising a reference voltage generation circuit,
wherein the reference voltage generation circuit is configured to output the reference voltage.

15 . The semiconductor device according to claim 14 ,
wherein operating of the reference voltage generation circuit is stopped after the sixth transistor is turned off.

Assignees

• Semiconductor Energy Lab

Inventors

• Takahashi Kei
• Tanada Yoshifumi

Classifications

• H03F3/45183

  Long tailed pairs (H03F3/4521, H03F3/45237 take precedence) · CPC title

• H03F2203/45506

  the CSC comprising only one switch · CPC title

• H02M3/156

  with automatic control of output voltage or current, e.g. switching regulators · CPC title

• H03F1/0211 Primary

  with control of the supply voltage or current · CPC title

• G05F1/56 Primary

  using semiconductor devices in series with the load as final control devices (G05F1/461 takes precedence) · CPC title