Display apparatus

US2018074569A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2018074569-A1
Application numberUS-201715817851-A
CountryUS
Kind codeA1
Filing dateNov 20, 2017
Priority dateOct 29, 2014
Publication dateMar 15, 2018
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display apparatus includes a display panel and a power supply. The display panel displays an image at a first driving frequency in a normal mode and displays an image at a second driving frequency in a low power mode. The second driving frequency is lower than the first driving frequency. The power supply outputs a first initialization voltage at a first level to the display panel during an active period of the low power mode. The power supply outputs a second initialization voltage at a second level to the display panel during at least a portion of a blank period of the low power mode. The second level is higher than the first level.

First claim

Opening claim text (preview).

1 - 20 . (canceled) 21 . A display apparatus, comprising: a display panel to display a first image at a first driving frequency in a normal mode and to display a second image at a second driving frequency lower than the first driving frequency in a low power mode; and a power supply to output a first initialization voltage at a first level to the display panel through an initialization voltage line during an active period of the low power mode and to output a second initialization voltage at a second level to the display panel through the initialization voltage line during at least a portion of a blank period of the low power mode, wherein the second level is higher than the first level, wherein the display panel includes a plurality of pixels, each of the pixels including: an organic light-emitting diode; a first transistor to drive the organic light-emitting diode with a current corresponding to the first image and the second image; and a second transistor including a first electrode connected to a gate electrode of the first transistor and a second electrode connected to the initialization voltage line. 22 . The apparatus as claimed in claim 21 , wherein the power supply is to: output the first initialization voltage during a first period of the blank period of the low power mode, and output the second initialization voltage during a second period that is subsequent to the first period of the blank period. 23 . The apparatus as claimed in claim 22 , wherein a length of the first period is substantially equal to a length of a blank period of the normal mode. 24 . The apparatus as claimed in claim 21 , wherein each of the pixels further includes: a capacitor connected between a first power voltage line and the gate electrode of the first transistor. 25 . The apparatus as claimed in claim 24 , wherein each of the pixels further includes: an auxiliary capacitor connected between the gate electrode of the first transistor and the second electrode of the second transistor. 26 . The apparatus as claimed in claim 25 , wherein the power supply is to: output the first initialization voltage during a first period of the blank period of the low power mode, and increasingly output the second initialization voltage from the first level to the second level during a second period subsequent to the first period of the blank period. 27 . The apparatus as claimed in claim 21 , wherein the second initialization voltage is a value that is equal to a voltage of the gate electrode of the first transistor of each of the plurality of pixels or a value that is equal to an average of voltages of gate electrodes of a plurality of first transistors of the plurality of pixels. 28 . The apparatus as claimed in claim 21 , wherein: during the blank period of the low power mode, the first and second transistors are turned off.

Assignees

Inventors

Classifications

  • with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes · CPC title

  • The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes · CPC title

  • G06F1/3265Primary

    Power saving in display device · CPC title

  • Change or adaptation of the frame rate of the video stream · CPC title

  • with pixel circuitry controlling the current through the light-emitting element · CPC title

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What does patent US2018074569A1 cover?
A display apparatus includes a display panel and a power supply. The display panel displays an image at a first driving frequency in a normal mode and displays an image at a second driving frequency in a low power mode. The second driving frequency is lower than the first driving frequency. The power supply outputs a first initialization voltage at a first level to the display panel during an a…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification G06F1/3265. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Mar 15 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).