Reconstructed wafer based devices with embedded environmental sensors and process for making same

Patent metadata

Field	Value
Publication number	US-2017369307-A1
Application number	US-201715633887-A
Country	US
Kind code	A1
Filing date	Jun 27, 2017
Priority date	Jun 27, 2016
Publication date	Dec 28, 2017
Grant date	—

Abstract

A one or multi-die module comprises multiple dies. The module includes at least one die with a sensor having a sensing region, an encapsulation layer covering top sides of the multiple dies, and a redistribution layer covering bottom sides of the multiple dies except for the sensing region. In embodiments, a cap is formed over the sensing region, which has at least a portion that is spaced away from a bottom side of the module. Metal connectors, such as solder balls, are formed on the redistribution layer to provide connection points to the module. A height of the cap from the bottom side of the module should be less than a height of the metal connectors. This approach can be used to incorporate environmental sensor dies into multi-die modules. It utilizes RDL and openings in the RDL in order to provide robust packaging for the dies, while also allowing the sensor dies to be selectively exposed to the environment.

First claim

What is claimed is:

1 . A integrated circuit die module, comprising:
one or more dies, including at least one die with a sensor having a sensing region; an encapsulation layer covering top sides of the one or more dies; a redistribution layer covering bottom sides of the multiple dies except for the sensing region.

2 . A module as claimed in claim 1 , further comprising a cap over the sensing region, which has at least a portion that is spaced away from the bottom side of the module.

3 . A module as claimed in claim 2 , further comprising metal connectors on the redistribution layer to provide connection points to the module, wherein a height of the cap from the bottom side of the module is less than a height of the metal connectors.

4 . A module as claimed in claim 1 , further comprising a channel formed in the redistribution layer between the sensing region and an outer side of the module.

5 . A module as claimed in claim 4 , further comprising a cap over the sensing region and the channel.

6 . A module as claimed in claim 1 , wherein the redistribution layer is removed from over the sensing region.

7 . A module as claimed in claim 1 , wherein the redistribution layer is not deposited over the sensing region.

8 . A module as claimed in claim 1 , sensor is a pressure sensor.

9 . A module as claimed in claim 1 , wherein the sensor is a gas sensor.

10 . A multi-die module manufacturing method, comprising:
encapsulating multiple dies, including at least one die with a sensor to form a multi-die module; and covering bottom sides of the dies with a redistribution layer covering except for a sensing region of the sensor.

11 . A method as claimed in claim 10 , further comprising placing a cap over the sensing region.

12 . A method as claimed in claim 10 , further comprising spacing the cap away from the bottom side of the module.

13 . A method as claimed in claim 10 , further comprising placing metal connectors on the redistribution layer to provide connection points to the dies.

14 . A method as claimed in claim 10 , further comprising forming a channel in the redistribution layer between the sensing region and an outer side of the module.

15 . A method as claimed in claim 14 , further comprising placing a cap over the sensing region and the channel.

16 . A method as claimed in claim 10 , further comprising removing the redistribution layer from over the sensing region.

17 . A method as claimed in claim 10 , further comprising not depositing the redistribution layer over the sensing region.

18 . A method as claimed in claim 10 , wherein the sensor is a pressure sensor.

19 . A method as claimed in claim 10 , wherein the sensor is a gas sensor.

Assignees

• Charles Stark Draper Laboratory Inc

Inventors

• Karpman Maurice S

Classifications

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W70/681

  comprising holes not having chips therein, e.g. for outgassing, underfilling or bond wire passage · CPC title

• H10W74/141

  the encapsulations being on at least the sidewalls of the semiconductor body · CPC title

• H10W70/60

  Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) · CPC title

• H10W70/09 Primary

  extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs · CPC title