Common gate amplifier circuit and power amplifier using the same

Patent metadata

Field	Value
Publication number	US-2017366140-A1
Application number	US-201715431278-A
Country	US
Kind code	A1
Filing date	Feb 13, 2017
Priority date	Jun 21, 2016
Publication date	Dec 21, 2017
Grant date	—

Abstract

A power amplifier includes a common source amplifier and a common gate amplifier circuit. The common source amplifier circuit has a terminal connected to a radio frequency (RF) input terminal and uses a source terminal commonly as an input terminal and an output terminal of the power amplifier. The common gate amplifier circuit has a terminal connected to the common source amplifier circuit and another terminal connected to an RF output terminal, and uses a gate terminal commonly as the input terminal and the output terminal of the power amplifier. The common gate amplifier circuit includes a Doherty amplifier including a main power amplifier and an auxiliary power amplifier that is connected to the main power amplifier in parallel.

First claim

What is claimed is:

1 . A power amplifier comprising:
a common source amplifier circuit having a terminal connected to a radio frequency (RF) input terminal and using a source terminal commonly as an input terminal and an output terminal of the power amplifier; and a common gate amplifier circuit having a terminal connected to the common source amplifier circuit and another terminal connected to an RF output terminal, and using a gate terminal commonly as the input terminal and the output terminal of the power amplifier, wherein the common gate amplifier circuit comprises a Doherty amplifier comprising a main power amplifier and an auxiliary power amplifier that is connected to the main power amplifier in parallel.

2 . The power amplifier of claim 1 , wherein the common gate amplifier circuit further comprises a load impedance adjusting circuit configured to adjust load impedance of the main power amplifier and load impedance of the auxiliary power amplifier.

3 . The power amplifier of claim 2 , wherein the load impedance adjusting circuit has a terminal connected to a drain terminal of the main power amplifier, and the other terminal connected to the RF output terminal and a drain terminal of the auxiliary power amplifier.

4 . The power amplifier of claim 2 , wherein the load impedance adjusting circuit comprises:
an inductor having a terminal connected to a drain terminal of the main power amplifier and the other terminal connected to a drain terminal of the auxiliary power amplifier; a first capacitor having a terminal connected to the drain terminal of the main power amplifier and the other terminal connected to a ground terminal; and a second capacitor having a terminal connected to the other terminal of the inductor and the other terminal connected to the ground terminal.

5 . The power amplifier of claim 2 , wherein the common gate amplifier circuit further comprises a phase shift circuit having a phase shift value corresponding to the load impedance adjusting circuit.

6 . The power amplifier of claim 5 , wherein the load impedance adjusting circuit is formed on the same path as the main power amplifier, and
the phase shift circuit is formed on the same path as the auxiliary power amplifier.

7 . The power amplifier of claim 5 , wherein the phase shift circuit is configured as a phi circuit corresponding to the load impedance adjusting circuit.

8 . The power amplifier of claim 1 , wherein the common source amplifier circuit and the common gate amplifier circuit are formed using a complementary metal oxide semiconductor (CMOS) process.

9 . A common gate amplifier circuit, applicable to a power amplifier having a cascode structure, the common gate amplifier circuit comprising:
a Doherty amplifier comprising a main power amplifier and an auxiliary power amplifier that is connected to the main power amplifier in parallel; and a load impedance adjusting circuit adjusting load impedance of the main power amplifier and load impedance of the auxiliary power amplifier.

10 . The common gate amplifier circuit of claim 9 , wherein the load impedance adjusting circuit has a terminal connected to a drain terminal of the main power amplifier, and the other terminal connected to an RF output terminal and a drain terminal of the auxiliary power amplifier.

11 . The common gate amplifier circuit of claim 9 , wherein the load impedance adjusting circuit comprises:
an inductor having a terminal connected to a drain terminal of the main power amplifier and the other terminal connected to a drain terminal of the auxiliary power amplifier; a first capacitor having a terminal connected to the drain terminal of the main power amplifier and the other terminal connected to a ground terminal; and a second capacitor having a terminal connected to the other terminal of the inductor and the other terminal connected to the ground terminal.

12 . The common gate amplifier circuit of claim 9 , further comprising a phase shift circuit having a phase shift value corresponding to the load impedance adjusting circuit.

13 . The common gate amplifier circuit of claim 12 , wherein the load impedance adjusting circuit is formed on the same path as the main power amplifier, and
the phase shift circuit is formed on the same path as the auxiliary power amplifier.

14 . The common gate amplifier circuit of claim 12 , wherein the phase shift circuit is configured as a phi circuit corresponding to the load impedance adjusting circuit.

15 . The common gate amplifier circuit of claim 12 , wherein the main power amplifier, the auxiliary power amplifier, the load impedance adjusting circuit, and the phase shift circuit are formed using a complementary metal oxide semiconductor (CMOS) process.

16 . The power amplifier of claim 1 , wherein the main power amplifier has a gate bias of a Class AB amplifier and the auxiliary power amplifier has a gate bias of Class C amplifier.

17 . A terminal comprising the power amplifier of claim 1 .

18 . A terminal comprising the common gate amplifier circuit of claim 9 .

19 . A differential power amplifier comprising:
a first common source amplifier circuit coupled in parallel to a second common source amplifier circuit, each of the first and second source amplifier circuits being respectively coupled to a radio frequency (RF) input terminal, and each of the first and second source amplifier circuits respectively using a source terminal as an input terminal and an output terminal of the differential power amplifier; and a first common gate amplifier circuit coupled in parallel to a second common gate amplifier circuit, each of the first and second common gate amplifier circuits having a terminal respectively coupled to the first and second common source amplifier circuits and another terminal connected to an RF output terminal, and each of the first and second common gate amplifier circuits respectively using a gate terminal as the input terminal and the output terminal of the differential power amplifier, wherein each of the first and second common gate amplifier circuits comprises a Doherty amplifier comprising a main power amplifier and an auxiliary power amplifier that is connected to the main power amplifier in parallel.

20 . The power amplifier of claim 19 , wherein the main power amplifier has a gate bias of a Class AB amplifier and the auxiliary power amplifier has a gate bias of Class C amplifier.

Assignees

• Samsung Electro Mech
• Korea Advanced Inst Sci & Tech

Inventors

• Jin yun su
• Kim Gyu Suck
• Hong Song Cheol

Classifications

• H03F2200/75

  the amplifier stage being a common source configuration MOSFET · CPC title

• H03F1/565

  using inductive elements · CPC title

• H03F2200/72

  the amplifier stage being a common gate configuration MOSFET · CPC title

• H03F1/0288 Primary

  using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers · CPC title

• H03F3/2171

  with field-effect devices (H03F3/2173 - H03F3/2178 take precedence) · CPC title