Photovoltaic Devices with Increased Efficiency and Methods for Making the Same

US2017352770A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2017352770-A1
Application numberUS-201615173626-A
CountryUS
Kind codeA1
Filing dateJun 4, 2016
Priority dateJun 4, 2016
Publication dateDec 7, 2017
Grant date

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Abstract

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A photovoltaic device with increased efficiency and a method for making the same. The present invention provides a photovoltaic device including: a transparent substrate; a transparent conductive electrode layer disposed on the transparent substrate; an n-type layer disposed on the transparent conductive electrode layer; a chalcogen absorber layer disposed on the n-type layer; a p-type molybdenum trioxide (MoO3) interlayer disposed on the chalcogen absorber layer; and a conductive layer disposed on the interlayer. A photovoltaic device having a superstrate configuration with the order of the layers reversed is also provided. The present invention further provides methods for making the photovoltaic devices according to the present invention.

First claim

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What is claimed is: 1 . A photovoltaic device, comprising: a transparent substrate; a transparent conductive electrode layer disposed on the transparent substrate; an n-type layer disposed on the transparent conductive electrode layer; a chalcogen absorber layer disposed on the n-type layer; a p-type molybdenum trioxide (MoO 3 ) interlayer disposed on the chalcogen absorber layer; and a conductive layer disposed on the interlayer. 2 . The photovoltaic device according to claim 1 , wherein the transparent conductive electrode layer is selected from the group consisting of: fluoride doped tin oxide (FTO), indium doped tin oxide (ITO), aluminum doped zinc oxide (ZnO:Al), and fluorine doped tin dioxide (SnO 2 :F). 3 . The photovoltaic device according to claim 1 , wherein the n-type layer is selected from the group consisting of: zinc dioxide and titanium dioxide. 4 . The photovoltaic device according to claim 3 , wherein the n-type layer has a thickness from about 2 nm to about 200 nm. 5 . The photovoltaic device according to claim 1 , wherein the chalcogen absorber layer is selenium at a thickness from about 25 nm to about 200 nm. 6 . The photovoltaic device according to claim 1 , wherein the conductive layer is selected from the group consisting of: (1) carbon including graphite, graphene, nanotubes and combinations thereof; (2) metals and their alloys including gold, silver, copper, platinum, palladium; Zn, Ni, Co, Mo, Fe V, Cr, Sn, W, Mo, Ti, Mg, and combinations thereof; and (3) conductive oxides including fluoride doped tin oxide (FTO), indium doped tin oxide (ITO) and aluminum doped zinc oxide (ZnO:Al). 7 . The photovoltaic device according to claim 1 , wherein the conductive layer has a thickness of about 2 nm to 2000 nm. 8 . The photovoltaic device according to claim 1 , further comprising: a tellurium (Te) adhesion layer disposed between the n-type layer and the chalcogen absorber layer. 9 . The photovoltaic device according to claim 8 , wherein the tellurium adhesion layer has a thickness of up to about 1 nanometer. 10 . A method for fabricating a photovoltaic device, comprising the steps of: forming a transparent conductive electrode layer on a transparent substrate; forming an n-type layer on a transparent conductive electrode layer; forming a chalcogen absorber layer on the n-type layer; forming a p-type interlayer of molybdenum trioxide (MoO 3 ) on the chalcogen absorber layer; forming a conductive layer on the p-type interlayer; and annealing at a temperature, pressure, and length of time sufficient to form the structure of the photovoltaic device. 11 . The method according to claim 10 , wherein the transparent conductive electrode layer is a material selected from the group consisting of: fluoride doped tin oxide (FTO), indium doped tin oxide (ITO) and aluminum doped zinc oxide (ZnO:Al). 12 . The method according to claim 10 , wherein the n-type layer is a material selected from the group consisting of: zinc dioxide and titanium dioxide. 13 . The method according to claim 10 , further comprising the step of: forming a tellurium (Te) adhesion layer between the n-type layer and the chalcogen absorber layer. 14 . A photovoltaic device, comprising: a transparent superstrate; a conductive layer disposed on the transparent superstrate; a p-type molybdenum trioxide (MoO 3 ) interlayer disposed on the conductive layer; a chalcogen absorber layer disposed on the p-type molybdenum trioxide (MoO 3 ) interlayer; an n-type layer disposed on the chalcogen absorber layer; and a transparent conductive electrode layer disposed on the n-type layer. 15 . The photovoltaic device according to claim 14 , wherein the transparent conductive electrode layer is selected from the group consisting of: fluoride doped tin oxide (FTO), indium doped tin oxide (ITO), aluminum doped zinc oxide (ZnO:Al), and fluorine doped tin dioxide (SnO 2 :F). 16 . The photovoltaic device according to claim 14 , wherein the n-type layer is selected from the group consisting of: zinc dioxide and titanium dioxide. 17 . The photovoltaic device according to claim 16 , wherein the n-type layer has a thickness from about 2 nm to about 200 nm. 18 . The photovoltaic device according to claim 14 , wherein the chalcogen absorber layer is selenium at a thickness from about 25 nm to about 200 nm. 19 . The photovoltaic device according to claim 14 , wherein the conductive layer is selected from the group consisting of: (1) carbon including graphite, graphene, nanotubes, and combinations thereof; (2) metals and their alloys: gold, silver, copper, platinum, palladium; Zn, Ni, Co, Mo, Fe V, Cr, Sn, W, Mo, Ti, Mg, and combinations thereof; and (3) conductive oxides: fluoride doped tin oxide (FTO), indium doped tin oxide (ITO) and aluminum doped zinc oxide (ZnO:Al). 20 . The photovoltaic device according to claim 14 , wherein the conductive layer has a thickness of about 2 nm to 2000 nm. 21 . The photovoltaic device according to claim 14 , further comprising: a tellurium (Te) adhesion layer disposed between the p-type molybdenum trioxide (MoO 3 ) layer and the chalcogen absorber layer. 22 . The photovoltaic device according to claim 21 , wherein the tellurium adhesion layer has a thickness of up to about 1 nanometer. 23 . A method for fabricating a photovoltaic device, comprising the steps of: forming a conductive layer on a transparent superstrate; forming a p-type molybdenum trioxide (MoO 3 ) interlayer on the conductive layer; forming a chalcogen absorber layer on the p-type molybdenum trioxide (MoO 3 ) interlayer; forming an n-type layer on the chalcogen absorber layer; forming a transparent conductive electrode layer on the n-type layer; and annealing at a temperature, pressure, and length of time sufficient to form the structure of the photovoltaic device. 24 . The method according to claim 23 , wherein the transparent conductive electrode layer is a material selected from the group consisting of: fluoride doped tin oxide (FTO), indium doped tin oxide (ITO) and aluminum doped zinc oxide (ZnO:Al). 25 . The method according to claim 23 , wherein the n-type layer is a material selected from the group consisting of: zinc dioxide and titanium dioxide. 26 . The method according to claim 23 , further comprising the step of: forming a tellurium (Te) adhesion layer between the p-type molybdenum trioxide (MoO 3 ) interlayer and the chalcogen absorber layer.

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What does patent US2017352770A1 cover?
A photovoltaic device with increased efficiency and a method for making the same. The present invention provides a photovoltaic device including: a transparent substrate; a transparent conductive electrode layer disposed on the transparent substrate; an n-type layer disposed on the transparent conductive electrode layer; a chalcogen absorber layer disposed on the n-type layer; a p-type molybden…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification H01L31/0336. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Dec 07 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).