Semiconductor device and manufacturing method thereof

Patent metadata

Field	Value
Publication number	US-2017294541-A1
Application number	US-201715477443-A
Country	US
Kind code	A1
Filing date	Apr 3, 2017
Priority date	Apr 8, 2016
Publication date	Oct 12, 2017
Grant date	—

Abstract

A highly reliable semiconductor device includes a first insulator, a second insulator, a first conductor, a third insulator, an oxide semiconductor, second and third conductors, a fourth insulator, a fourth conductor overlapping with a region between the second and third conductors, a fifth insulator, and a sixth insulator in this order. The fourth insulator is in contact with top and side surfaces of the oxide semiconductor, and a top surface of the third insulator. The fifth insulator is in contact with the side surface of the oxide semiconductor and the top surface of the third insulator so as to cover the oxide semiconductor, the second to fourth conductors, and the fourth insulator. The first, second, fifth, and sixth insulators have low permeability for hydrogen, water, and oxygen. The first and sixth insulators have a thinner thickness than the second and sixth insulators, respectively.

First claim

1 . A semiconductor device comprising:
a first insulator; a second insulator over the first insulator; a first conductor over the second insulator; a third insulator over the first conductor; an oxide semiconductor over the third insulator; a second conductor and a third conductor each over the oxide semiconductor; a fourth insulator over the oxide semiconductor, the second conductor and the third conductor; a fourth conductor over the fourth insulator; a fifth insulator covering the oxide semiconductor, the second conductor, the third conductor, the fourth conductor and the fourth insulator; and a sixth insulator over the fifth insulator, wherein the second conductor and the third conductor are apart from each other, wherein at least part of the fourth conductor and a region between the second conductor and the third conductor overlap each other, wherein the fifth insulator is in contact with a top surface of the third insulator and a side surface of the oxide semiconductor, wherein each of the first, second, fifth, and sixth insulators has lower permeability for hydrogen, water and oxygen than each of the third insulator and the fourth insulator, and wherein each of the first insulator and the sixth insulator has a smaller thickness than each of the second insulator and the fifth insulator.

2 . The semiconductor device according to claim 1 ,
wherein the oxide semiconductor comprises In, M and Zn, and wherein M is an element selected from Al, Ga, Y and Sn.

3 . The semiconductor device according to claim 1 , wherein each of the third insulator and the fourth insulator comprises Si and O.

4 . The semiconductor device according to claim 1 , wherein each of the first insulator, the second insulator, the fifth insulator and the sixth insulator comprises Al and O.

5 . A semiconductor device comprising:
a first insulator; a second insulator over the first insulator; a first conductor over the second insulator; a third insulator over the first conductor; a first oxide over the third insulator; a second oxide over the first oxide; a second conductor and a third conductor each over the second oxide; a third oxide over the second oxide, the second conductor, and the third conductor; a fourth insulator over the third oxide; a fourth conductor over the fourth insulator; a fifth insulator covering the first oxide, the second oxide, the third oxide, the second conductor, the third conductor, the fourth conductor, and the fourth insulator; and a sixth insulator over the fifth insulator, wherein the second conductor and the third conductor are apart from each other, wherein the third oxide is in contact with a first top surface of the third insulator, a side surface of the first oxide, a first side surface of the second oxide, and a first top surface of the second oxide, wherein at least part of the fourth conductor and a region between the second conductor and the third conductor overlap each other, wherein the fifth insulator is in contact with a second top surface of the third insulator and a second side surface of the second oxide, wherein each of the first insulator, the second insulator, the fifth insulator and the sixth insulator has lower permeability for hydrogen, water and oxygen than each of the third insulator and the fourth insulator, and wherein each of the first insulator and the sixth insulator has a smaller thickness than each of the second insulator and the fifth insulator.

6 . The semiconductor device according to claim 5 , further comprising:
a seventh insulator in contact with a top surface of the fourth conductor, wherein the seventh insulator has lower permeability for oxygen than each of the third insulator and the fourth insulator.

7 . The semiconductor device according to claim 6 , wherein an end portion of the third oxide and an end portion of the seventh insulator are substantially aligned.

8 . The semiconductor device according to claim 6 , wherein an end portion of the third oxide, an end portion of the fourth insulator, and an end portion of the seventh insulator are substantially aligned.

9 . The semiconductor device according to claim 5 , further comprising:
an eighth insulator over the sixth insulator; a ninth insulator over the eighth insulator; and a tenth insulator over the ninth insulator, wherein the third insulator, the fifth insulator, the sixth insulator and the eighth insulator have an opening reaching the second insulator, wherein the ninth insulator is in contact with a second top surface of the second insulator through the opening, wherein the opening surrounds an external side of the second oxide when seen above, wherein each of the ninth insulator and the tenth insulator has lower permeability for hydrogen, water and oxygen than the eighth insulator, and wherein the tenth insulator has a thinner thickness than the ninth insulator.

10 . The semiconductor device according to claim 5 ,
wherein each of the first oxide, the second oxide and the third oxide comprises In, M and Zn, and wherein M is an element selected from Al, Ga, Y and Sn.

11 . The semiconductor device according to claim 5 , wherein each of the third insulator and the fourth insulator comprises Si and O.

12 . The semiconductor device according to claim 5 , wherein each of the first insulator, the second insulator, the fifth insulator and the sixth insulator comprises Al and O.

13 . A manufacturing method for a semiconductor device, comprising the steps of:
forming a first insulator; forming a second insulator over the first insulator; forming a first conductor over the second insulator; forming a third insulator over the first conductor; forming a first oxide over the third insulator; forming a second oxide over the first oxide; forming a second conductor and a third conductor over the second oxide with a space between the second conductor and the third conductor; forming a third oxide over the second oxide, the second conductor and the third conductor, and being in contact with a top surface of the second oxide, a side surface of the second oxide, a side surface of the first oxide, and a top surface of the third insulator; forming a fourth insulator over the third oxide; forming a fourth conductor over the fourth insulator so that at least part of the fourth conductor and a region between the second conductor and the third conductor overlap each other; forming a fifth insulator over the fourth conductor and the third oxide; forming a fourth oxide by wet etching of the third oxide using the fifth insulator as a mask; performing a first heat treatment in a first chamber of a deposition apparatus; forming a sixth insulator over the fifth insulator by a sputtering method with heating in a second chamber of the deposition apparatus; performing a second heat treatment under a nitrogen atmosphere; and forming a seventh insulator over the sixth insulator by an atomic layer deposition method.

14 . The manufacturing method for a semiconductor device according to claim 13 ,
wherein part of the third oxide is removed in the step of forming the fifth insulator, and wherein a residue of the third oxide remaining on the side surface of the second oxide is removed by the wet etching in the step of forming the fourth oxide.

15 . The manufacturing method for a semiconductor device according to claim 13 , wherein the first heat treatment is performed under an oxygen atmosphere.

16 . The manufacturing method of a semiconductor device according to claim 13 , further comprising the steps of:
forming an e

Assignees

• Semiconductor Energy Lab

Inventors

• Yamazaki Shunpei

Classifications

• H10P95/90

  Thermal treatments, e.g. annealing or sintering · CPC title

• H10P50/642

  Chemical etching · CPC title

• H10P14/6339

  deposition by cyclic CVD, e.g. ALD, ALE or pulsed CVD · CPC title

• C01B33/113

  Silicon oxides; Hydrates thereof {(preparing monoxide by reduction of siliceous material C01B33/182)} · CPC title

• C23C16/401

  containing silicon · CPC title