Systems and methods for electromagnetic interference shielding

US2017287846A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2017287846-A1
Application numberUS-201615087270-A
CountryUS
Kind codeA1
Filing dateMar 31, 2016
Priority dateMar 31, 2016
Publication dateOct 5, 2017
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Discussed generally herein are methods and devices including or providing an electromagnetic interference (EMI) shielding. A device can include substrate including electrical connection circuitry therein, ground circuitry on, or at least partially in the substrate, the ground circuitry at least partially exposed by a surface of the substrate, a die electrically connected to the connection circuitry and the ground circuitry, the die on the substrate, a conductive material on a die backside, and a conductive paste or one or more wires electrically connected to the ground circuitry and the conductive material.

First claim

Opening claim text (preview).

1 . A device with electromagnetic interference (EMI) shielding, the device comprising: a substrate including electrical connection circuitry therein; ground circuitry on, or at least partially in, the substrate and at least partially exposed by a surface of the substrate; a die electrically connected to the connection circuitry and the grounding circuitry, the die on the substrate; a conductive foil or conductive film on and covering a die backside and sides of the die, and partially covering an active side of the die, the active side of the die opposite the die backside the sides of the die between the active side and the die backside; and a conductive paste or one or more wires electrically connected to the grounding circuitry and the conductive material. 2 . The device of claim 1 , further comprising one or more undercuts on an active side of the die, the active side interfacing directly with the substrate and opposite the die backside. 3 . The device of claim 2 , wherein the conductive material is a sputtered conductor or a conductive paste, the conductive material is directly on the die backside, and wherein the conductive material fills the one or more undercuts. 4 . (canceled) 5 . The device of claim 1 , wherein the conductive material includes a conductive film or conductive foil only on the die backside and the device further comprises an adhesive directly on the die backside adhering the conductive film or conductive foil to the die backside. 6 . The device of claim 1 , wherein the ground circuitry includes one or more ground pads on or at partially in the substrate, each of the ground pads electrically coupled to logical ground of the substrate. 7 . The device of claim 1 , further comprising one or more solder balls electrically and mechanically connected to the active side of the die and the electrical connection circuitry of the substrate. 8 . The device of claim 1 , wherein the conductive paste or one or more wires is the conductive paste. 9 . The device of claim 1 , wherein the conductive paste or one or more wires is the one or more wires. 10 . The device of claim 1 , further comprising a molding material situated on the substrate, on an active surface of the die, on conductive material on the active surface of the die, and on conductive material on the sides of the die. 11 - 20 . (canceled)

Assignees

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Classifications

  • Shapes of semiconductor bodies · CPC title

  • materials for magnetic shielding, e.g. ferromagnetic materials · CPC title

  • shielding resins · CPC title

  • of die-attach connectors · CPC title

  • of bump connectors · CPC title

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What does patent US2017287846A1 cover?
Discussed generally herein are methods and devices including or providing an electromagnetic interference (EMI) shielding. A device can include substrate including electrical connection circuitry therein, ground circuitry on, or at least partially in the substrate, the ground circuitry at least partially exposed by a surface of the substrate, a die electrically connected to the connection circu…
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification H10W42/20. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Oct 05 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).