Sheet Generator For Image Processor

US2017257515A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2017257515-A1
Application numberUS-201715598933-A
CountryUS
Kind codeA1
Filing dateMay 18, 2017
Priority dateApr 23, 2015
Publication dateSep 7, 2017
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A sheet generator circuit is described. The sheet generator includes electronic circuitry to receive a line group of image data including multiple rows of data from a frame of image data. The multiple rows are sufficient in number to encompass multiple neighboring overlapping stencils. The electronic circuitry is to parse the line group into a smaller sized sheet. The electronic circuitry is to load the sheet into a data computation unit having a two dimensional shift array structure coupled to an array of processors.

First claim

Opening claim text (preview).

1 . A computing device comprising: one or more stencil processors, wherein each stencil processor is configured to perform one or more kernel functions on stencils of image data using a two-dimensional array of processing elements, wherein each stencil is a two-dimensional region of image data; and a sheet generator configured to receive a line group from a line buffer and output a plurality of sheets of image data to a first stencil processor of the one or more stencil processors, each sheet of image data having at least as many pixels as processing elements in the two-dimensional array of processing elements of the first stencil processor, wherein the line group comprises multiple rows of data from a frame of image data. 2 . The computing device of claim 1 , wherein the sheet generator is configured to write an output line group into a second line buffer of the computing device, the output line group comprising one or more sheets of image data computed by the two-dimensional array of processing elements of the first stencil processor. 3 . The computing device of claim 1 , wherein the computing device comprises a plurality of sheet generators, and wherein each stencil processor of the one or more stencil processors has a respective dedicated sheet generator. 4 . The computing device of claim 3 , wherein each sheet generator is configured to read to and write from any of a plurality of line buffers of the computing device. 5 . The computing device of claim 1 , wherein the sheet generator is configured to obtain, from the line buffer, first line groups of image data that that are larger than second line groups of image data that the sheet generator is configured to write to one or more second line buffers. 6 . The computing device of claim 1 , wherein each sheet of image data comprises data of multiple overlapping stencils. 7 . The computing device of claim 1 , wherein memory of the first stencil processor comprises a two-dimensional shift-register array. 8 . The computing device of claim 1 , wherein the computing device is configured to programmatically redefine a size of the sheets of image data. 9 . The computing device of claim 1 , wherein each stencil processor has multiple register layers, and wherein the sheet generator is configured to generate separate sheets for each of the multiple register layers and to store each separate sheet in a different register layer of the multiple register layers. 10 . The computing device of claim 9 , wherein the sheet generator is configured to generate the separate sheets for each channel of multiple channels of input image data or for each component of multi-dimensional data constructs. 11 . The computing device of claim 9 , wherein a bit width of the image data is greater than a bit width of registers of the first stencil processor, wherein the sheet generator is configured to generate a first sheet having a high bit portion of image data and a second sheet having a low bit portion of the image data and to store the first sheet in a first register layer and the second sheet in a second register layer of the first stencil processor. 12 . The computing device of claim 1 , wherein the sheet generator is configured to generate an upsampled sheet having upsampled image data by copying multiple instances of each data value in a line group received from the line buffer. 13 . The computing device of claim 1 , wherein the sheet generator is configured to generate a downsampled sheet having downsampled image data by writing multiple instances of each data value to a line group provided to the line buffer. 14 . A method comprising: receiving, by a sheet generator, a line group from a line buffer; outputting, by the sheet generator, a plurality of sheets of image data from the line group to a first stencil processor of one or more stencil processors of a computing device, each sheet of image data having at least as many pixels as processing elements in a two-dimensional array of processing elements of the first stencil processor, wherein the line group comprises multiple rows of data from a frame of image data; and performing, by the first stencil processor, one or more kernel functions on stencils of image data of each sheet of the plurality of sheets of image data using the two-dimensional array of processing elements, wherein each stencil is a two-dimensional region of image data. 15 . The method of claim 14 , further comprising: writing, by the sheet generator, an output line group into a second line buffer of the computing device, the output line group comprising one or more sheets of image data computed by the two-dimensional array of processing elements of the first stencil processor. 16 . The method of claim 14 , wherein the computing device comprises a plurality of sheet generators, and wherein each stencil processor of the one or more stencil processors has a respective dedicated sheet generator. 17 . The method of claim 16 , wherein each sheet generator is configured to read to and write from any of a plurality of line buffers of the computing device. 18 . The method of claim 14 , wherein the sheet generator is configured to obtain, from the line buffer, first line groups of image data that that are larger than second line groups of image data that the sheet generator is configured to write to one or more second line buffers. 19 . The method of claim 14 , wherein each sheet of image data comprises data of multiple overlapping stencils. 20 . The method of claim 14 , wherein memory of the first stencil processor comprises a two-dimensional shift-register array.

Assignees

Inventors

Classifications

  • G06T1/20Primary

    Processor architectures; Processor configuration, e.g. pipelining · CPC title

  • for printing sheets · CPC title

  • G06T1/60Primary

    Memory management · CPC title

  • Display, printing, storage or transmission of additional information, e.g. ID code, date and time or title · CPC title

  • involving image processing hardware · CPC title

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What does patent US2017257515A1 cover?
A sheet generator circuit is described. The sheet generator includes electronic circuitry to receive a line group of image data including multiple rows of data from a frame of image data. The multiple rows are sufficient in number to encompass multiple neighboring overlapping stencils. The electronic circuitry is to parse the line group into a smaller sized sheet. The electronic circuitry is to…
Who is the assignee on this patent?
Google Inc
What technology area does this patent fall under?
Primary CPC classification G06T1/20. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Sep 07 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).