Semiconductor memory device

Patent metadata

Field	Value
Publication number	US-2017229577-A1
Application number	US-201615262433-A
Country	US
Kind code	A1
Filing date	Sep 12, 2016
Priority date	Feb 10, 2016
Publication date	Aug 10, 2017
Grant date	—

Abstract

According to one embodiment, a semiconductor memory device includes a substrate, a stacked body, a pillar structure, at least one charge storage film, and a first electrode. The stacked body includes electrode films stacked separately from each other. The pillar structure is provided in the stacked body and includes a semiconductor layer extending in stacking direction of the stacked body. The charge storage film is provided between the semiconductor layer and the electrode films. The first electrode is provided in the stacked body, spreads in the stacking direction and a first direction along a surface of the substrate, and contacting the substrate. The first electrode includes a first portion containing a material having conductivity and a second portion containing a material that a linear expansion coefficient is lower than a linear expansion coefficient of silicon, and positioned at a substrate side than the first portion in the stacking direction.

First claim

1 . A semiconductor memory device comprising:
a substrate; a stacked body provided on the substrate and including a plurality of electrode films stacked separately from each other; a pillar structure provided in the stacked body and including a semiconductor layer extending in a stacking direction of the stacked body; at least one charge storage film provided between the semiconductor layer and the electrode films; and a plurality of first electrodes provided in the stacked body, each of the first electrodes extending in the stacking direction and a first direction along a surface of the substrate, the first electrodes contacting the substrate, the first electrodes being disposed in a second direction along the surface of the substrate, the second direction crossing the first direction, and the first electrodes including first and second portions, the first portion containing a material having conductivity, the second portion containing a material whose linear expansion coefficient is lower than a linear expansion coefficient of silicon, the second portion being positioned at a substrate side than the first portion in the stacking direction.

2 . The device according to claim 1 , wherein
the second portion has a compressive stress.

3 . The device according to claim 1 , wherein
the second portion contains silicon oxide.

4 . The device according to claim 1 , wherein
the second portion contains at least any of titanium nitride, titanium silicide, and titanium aluminum nitride.

5 . The device according to claim 1 , wherein
the second portion contains silicon nitride.

6 . The device according to claim 1 , wherein
the first portion has a tensile stress.

7 . The device according to claim 1 , wherein
the first portion contains tungsten or molybdenum, and the first electrodes include a conductive first layer covering the first and second portions.

8 . The device according to claim 1 , wherein
the first electrodes include a conductive portion covering at least the second portion.

9 . The device according to claim 8 , wherein
the conductive portion is provided between the stacked body and the second portion.

10 . The device according to claim 8 , wherein
the conductive portion is formed of a same material as the first portion.

11 . The device according to claim 8 , wherein
the first portion contains tungsten or molybdenum, and the first electrodes further include a conductive first layer provided between the stacked body and the conductive portion and covering the first and second portions.

12 . A semiconductor memory device comprising:
a substrate; a stacked body provided on the substrate and including a plurality of electrode films stacked separately from each other; a pillar structure provided in the stacked body and including a semiconductor layer extending in a stacking direction of the stacked body; at least one charge storage film provided between the semiconductor layer and the electrode films; and a plurality of first electrodes provided in the stacked body, each of the first electrodes extending in the stacking direction and a first direction along a surface of the substrate, the first electrodes contacting the substrate, the first electrodes being disposed in a second direction along the surface of the substrate, the second direction crossing the first direction, and the first electrode comprising:
a main body portion including first and second portions, the second portion being positioned at a substrate side than the first portion in the stacking direction;
a peripheral portion provided between the stacked body and the main body portion; and
a conductive portion provided between the peripheral portion and the second portion,
the first portion containing a material having conductivity, and
the second portion containing a material that a linear expansion coefficient is lower than a linear expansion coefficient of silicon.

13 . The device according to claim 12 , wherein
the second portion has a compressive stress.

14 . The device according to claim 12 , wherein
the second portion contains silicon oxide.

15 . The device according to claim 12 , wherein
the second portion contains at least any of titanium nitride, titanium silicide, and titanium aluminum nitride.

16 . The device according to claim 12 , wherein
the conductive portion is formed of a same material as the first portion.

17 . The device according to claim 12 , wherein
the first portion contains tungsten or molybdenum, and the peripheral portion includes titanium nitride.

18 . A semiconductor memory device comprising:
a substrate; a stacked body provided on the substrate and including a plurality of electrode films stacked separately from each other; a pillar structure provided in the stacked body and including a semiconductor layer extending in a stacking direction of the stacked body; at least one charge storage film provided between the semiconductor layer and the electrode films; and a plurality of first electrodes provided in the stacked body, each of the first electrodes extending in the stacking direction and a first direction along a surface of the substrate, the first electrodes contacting the substrate, the first electrodes being disposed in a second direction along the surface of the substrate, the second direction crossing the first direction, and the first electrodes including first and second portions, the first portion containing a material having conductivity, the second portion containing a material having a compressive stress, the second portion being positioned at a substrate side than the first portion in the stacking direction.

Assignees

• Toshiba Kk

Inventors

• Matsuura Osamu
• Inokuma Hideki
• Fujita Masanari

Classifications

• H01L27/11582

  Electricity · mapped topic

• H01L27/1157

  Electricity · mapped topic

• H01L29/7843 Primary

  Electricity · mapped topic

• H10B43/50

  characterised by the boundary region between the core and peripheral circuit regions · CPC title

• H10B43/27 Primary

  the channels comprising vertical portions, e.g. U-shaped channels · CPC title