Finfet devices having a material formed on reduced source/drain region

US2017229559A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2017229559-A1
Application numberUS-201715498272-A
CountryUS
Kind codeA1
Filing dateApr 26, 2017
Priority dateSep 26, 2014
Publication dateAug 10, 2017
Grant date

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

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A semiconductor device includes a fin structure of a first semiconductor material on a substrate. The fin structure has a source region, a drain region, and a channel region between the source region and the drain region. The device also has a gate structure overlying the fin structure. The source region includes an inner portion of the first semiconductor material and an outer portion of a second semiconductor material overlying a top surface and side surfaces of the inner portion. The drain region includes an inner portion of the first semiconductor material and an outer portion of the second semiconductor material overlying a top surface and side surfaces of the inner portion.

First claim

Opening claim text (preview).

What is claimed is: 1 . A semiconductor device, comprising: a fin structure of a first semiconductor material on a substrate; a gate structure overlying and across the fin structure; a channel region comprising a first portion of the fin structure under the gate structure; a source region comprising a second portion of the fin structure not under the gate structure, a cross-sectional area of the second portion being smaller than a cross-sectional area of the fin structure in the channel region; and a drain region comprising a third portion of the fin structure not under the gate structure, a cross-sectional area of the third portion being smaller than the cross-sectional area of the fin structure in the channel region; wherein the source region further comprises a layer of a second semiconductor material overlying a top surface, a first and a second side surfaces, and an end surface of the second portion of the fin structure; wherein the drain region further comprises a layer of the second semiconductor material overlying a top surface, a first and a second side surfaces, and an end surface of the third portion of the fin structure. 2 . The device of claim 1 , wherein a top surface of the source region is higher than a top surface of the channel region. 3 . The device of claim 1 , wherein the first semiconductor material comprises a silicon (Si) material, and the second semiconductor material comprises a silicon germanium (SiGe) material. 4 . The device of claim 1 , wherein the first semiconductor material comprises a silicon (Si) material, and the second semiconductor material comprises a silicon carbide (SiC) material. 5 . A semiconductor device, comprising: a fin structure of a first semiconductor material on a substrate, the fin structure having a source region, a drain region, and a channel region between the source region and the drain region; a gate structure overlying the fin structure; wherein the source region includes an inner portion of the first semiconductor material and an outer portion of a second semiconductor material overlying a top surface and side surfaces of the inner portion; wherein the drain region includes an inner portion of the first semiconductor material and an outer portion of the second semiconductor material overlying a top surface and side surfaces of the inner portion. 6 . The device of claim 5 , wherein a height of the outer portion of the source region is higher than a top surface of the channel region. 7 . The device of claim 5 , wherein a height of the outer portion of the drain region is higher than a top surface of the channel region. 8 . The device of claim 5 , wherein the first semiconductor material comprises a silicon (Si) material, and the second semiconductor material comprises a silicon germanium (SiGe) material. 9 . The device of claim 8 , wherein the first semiconductor material comprises a silicon (Si) material, and the second semiconductor material comprises a silicon carbide (SiC) material.

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What does patent US2017229559A1 cover?
A semiconductor device includes a fin structure of a first semiconductor material on a substrate. The fin structure has a source region, a drain region, and a channel region between the source region and the drain region. The device also has a gate structure overlying the fin structure. The source region includes an inner portion of the first semiconductor material and an outer portion of a sec…
Who is the assignee on this patent?
Semiconductor Mfg Int Shanghai Corp
What technology area does this patent fall under?
Primary CPC classification H01L29/66795. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Aug 10 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).