Circuit device, oscillator, electronic apparatus, and vehicle

Patent metadata

Field	Value
Publication number	US-2017194971-A1
Application number	US-201615385266-A
Country	US
Kind code	A1
Filing date	Dec 20, 2016
Priority date	Jan 6, 2016
Publication date	Jul 6, 2017
Grant date	—

Abstract

A circuit device includes an oscillation signal generation circuit, a reference signal input terminal to which a reference signal is input, and an internal phase comparator that performs phase comparison between an input signal based on the oscillation signal and the reference signal. The oscillation signal generation circuit generates the oscillation signal using the frequency control data based on a result of the phase comparison from an external phase comparator which performs phase comparison between an input signal based on the oscillation signal and the reference signal in a first mode, and generates the oscillation signal using the frequency control data based on a result of the phase comparison from the internal phase comparator in a second mode.

First claim

What is claimed is:

1 . A circuit device comprising:
an oscillation signal generation circuit that generates an oscillation signal using frequency control data and a resonator; a reference signal input terminal to which a reference signal is input; and an internal phase comparator that performs phase comparison between an input signal based on the oscillation signal and the reference signal which is input via the reference signal input terminal, wherein the oscillation signal generation circuit is configured to:
generate the oscillation signal using the frequency control data based on a result of the phase comparison from an external phase comparator which performs phase comparison between an input signal based on the oscillation signal and the reference signal in a first mode, and
generate the oscillation signal using the frequency control data based on a result of the phase comparison from the internal phase comparator in a second mode.

2 . The circuit device according to claim 1 , further comprising:
a processor that performs a signal process, wherein, in the first mode, the processor determines whether or not a first hold-over state corresponding to a hold-over state of the external phase comparator due to the absence or abnormality of the reference signal has occurred, on the basis of a voltage of an input terminal to which a hold-over detection signal is input or hold-over detection information which is input via a digital interface.

3 . The circuit device according to claim 2 ,
wherein, in the second mode, the processor determines whether or not a second hold-over state corresponding to a hold-over state of the internal phase comparator due to the absence or abnormality of the reference signal has occurred, on the basis of the reference signal which is input via the reference signal input terminal.

4 . The circuit device according to claim 3 , further comprising:
a detection circuit that detects a lock state of a PLL circuit including the internal phase comparator, wherein, in the second mode, the processor determines whether or not the second hold-over state has occurred on the basis of the reference signal which is input via the reference signal input terminal and a PLL lock detection signal from the detection circuit.

5 . The circuit device according to claim 4 ,
wherein the processor determines that the second hold-over state has occurred in a case where it is determined that the reference signal is absent or abnormal, and the PLL circuit is not in the lock state.

6 . The circuit device according to claim 3 ,
wherein, in a case where it is determined that the first hold-over state or the second hold-over state has occurred, the processor generates the aging-corrected frequency control data, and outputs the frequency control data to the oscillation signal generation circuit.

7 . The circuit device according to claim 1 , further comprising:
a digital interface, wherein, in the first mode, the frequency control data based on a result of phase comparison from the external phase comparator is input to the digital interface, and the oscillation signal generation circuit generates the oscillation signal on the basis of the frequency control data input to the digital interface.

8 . An oscillator comprising:
the circuit device according to claim 1 ; and the resonator.

9 . An electronic apparatus comprising the circuit device according to claim 1 .

10 . A vehicle comprising the circuit device according to claim 1 .

Assignees

• Seiko Epson Corp

Inventors

• Yonezawa Takemi

Classifications

• H03B5/32

  being a piezoelectric resonator (selection of piezoelectric material H10N30/00) · CPC title

• H03L7/095 Primary

  using a lock detector (H03L7/087 takes precedence) · CPC title

• H03L7/091

  the phase or frequency detector using a sampling device (H03L7/087 takes precedence) · CPC title

• H03L1/026

  by using a memory for digitally storing correction values (H03L1/025 takes precedence) · CPC title

• H03L7/099

  concerning mainly the controlled oscillator of the loop · CPC title