Phase lock loop control for digital communication systems

Patent metadata

Field	Value
Publication number	US-9203522-B2
Application number	US-19412208-A
Country	US
Kind code	B2
Filing date	Aug 19, 2008
Priority date	Aug 19, 2008
Publication date	Dec 1, 2015
Grant date	Dec 1, 2015

Abstract

An optical receiver includes an optical detector that is positioned to detect an optical data signal received from an optical channel generates a received electrical data signal at an output. An electrical switch passes one of the received electrical data signal and a second electrical signal depending upon a control signal applied to a control input. A data and clock recovery circuit generates a recovered clock and a recovered data signal when a signal-to-noise ratio of the received electrical signal is in a range where a signal locking condition is established, and generates the control signal at the control output that instructs the electrical switch to select the received electrical data signal if the signal locking condition is established and to select the second electrical signal if the signal locking condition is not established.

First claim

What is claimed is:

1. An optical receiver comprising:
a. an optical detector having an input that is positioned to detect an optical data signal received from an optical channel, the optical detector generating a received electrical data signal at an output;
b. an electrical switch having a first input that is electrically coupled to output of the optical detector and a second input that is electrically coupled to an electrical data source that generates a second electrical dat…

Assignees

• Mizuhara Osamu
• Finisar Corp

Inventors

• Mizuhara Osamu

Classifications

• H03L7/095

  Electricity · mapped topic

• H04L7/0083

  Electricity · mapped topic

• H04B10/69 Primary

  Electricity · mapped topic

• H03L7/06

  Electricity · mapped topic