Method of making a gallium nitride device

Patent metadata

Field	Value
Publication number	US-2017194449-A1
Application number	US-201514986519-A
Country	US
Kind code	A1
Filing date	Dec 31, 2015
Priority date	Dec 31, 2015
Publication date	Jul 6, 2017
Grant date	—

Abstract

A method of making a GaN device includes: forming a GaN substrate; forming a plurality of spaced-apart first metal contacts directly on the GaN substrate; forming a layer of insulating GaN on the exposed portions of the upper surface; forming a stressor layer on the contacts and the layer of insulating GaN; forming a handle substrate on the first surface of the stressor layer; spalling the GaN substrate that is located beneath the stressor layer to separate a layer of GaN and removing the handle substrate; bonding the stressor layer to a thermally conductive substrate; forming a plurality of vertical channels through the GaN to define a plurality of device structures; removing the exposed portions of the layer of insulating GaN to electrically isolate the device structures; forming an ohmic contact layer on the second surface; and forming second metal contacts on the ohmic contact layer.

First claim

1 . A method of making a GaN device, comprising:
forming a GaN substrate having an upper surface; forming a plurality of spaced-apart first metal contacts directly on the upper surface of the GaN substrate, the contacts spaced apart by exposed portions of the upper surface; forming a layer of insulating GaN on the exposed portions of the upper surface; forming a stressor layer on the contacts and the layer of insulating GaN, the stressor layer having a first surface; forming a handle substrate on the first surface of the stressor layer; spalling the GaN substrate that is located beneath the stressor layer to separate a layer of GaN and expose a stressor layer second surface and removing the handle substrate; bonding the first surface of the stressor layer to a thermally conductive substrate; forming a plurality of vertical channels having opposing sidewalls through the insulating GaN to provide exposed portions of the layer of insulating GaN to define a plurality of device structures, each device structure comprising at least one contact; removing the exposed portions of the layer of insulating GaN to electrically isolate the device structures; and forming an ohmic contact layer on the stressor layer second surface; and forming a plurality of second metal contacts on the ohmic contact layer.

2 . The method of claim 1 , further comprising depositing a metal layer on the first metal contacts and the exposed portions of the upper surface, wherein depositing the metal layer comprises forming the layer of insulating GaN.

3 . The method of claim 2 , wherein the metal layer comprises Ti, Cr, Ta, W, Cu, Pt, Al, Au, or Ni, or any combination of the aforementioned metals.

4 . The method of claim 1 , wherein the forming a layer of insulating GaN on the exposed portions of the upper surface comprises inducing microstructural changes in a layer proximate the upper surface of the insulating GaN.

5 . The method of claim 1 , further comprising etching to remove the insulating GaN proximate the channels and define a final channel width.

6 . The method of claim 1 , further comprising doping the insulating GaN to form a p-type region or an n-type region therein, or a combination thereof.

7 . The method of claim 1 , wherein the metal layer comprises titanium, the stressor layer comprises nickel, the first metal contacts comprise nickel and silver, and the ohmic contacts comprise a layer of an optically transparent, electrical conductive material comprising indium tin oxide, aluminum-doped zinc oxide, indium-doped cadmium oxide, a transparent conductive polymer, or carbon nanotubes.

8 . The method of claim 1 , further comprising forming a layer of insulating GaN on the opposing sidewalls of the channels.

9 . The method of claim 1 , etching the second surface of the insulating GaN prior to forming the ohmic contact layer.

10 . A method of making a GaN device, comprising:
forming a GaN substrate having an upper surface; forming a plurality of spaced-apart first metal contacts directly on the upper surface of the GaN substrate, the contacts spaced apart by exposed portions of the upper surface; forming a plurality of first vertical channels having first opposing sidewalls in the exposed portions of the upper surface partially through the insulating GaN to define a plurality of device structures, each device structure configured to comprise at least one contact; forming a metal layer on the contacts, the exposed portions of the upper surface and the first opposing sidewalls, the forming of the metal layer comprises forming a layer of insulating GaN on the exposed portions of the upper surface and the first opposing sidewalls; forming a stressor layer on the metal layer, the stressor layer having a first surface; forming a handle substrate on the first surface of the stressor layer; spalling the GaN substrate that is located beneath the stressor layer to separate a layer of GaN and expose a stressor layer second surface and removing the handle substrate; bonding the first surface of the stressor layer to a thermally conductive substrate; defining a plurality of second vertical channels having second opposing sidewalls and corresponding to the first vertical channels through the insulating GaN to exposed portions of the metal layer in the first channels; removing the metal layer in and under the first channels to the stressor layer to electrically isolate the device structures; forming an ohmic contact layer on the stressor layer second surface; and forming a plurality of second metal contacts on the ohmic contact layer.

11 . The method of claim 10 , further comprising forming a layer of insulating GaN on the exposed portions of the upper surface prior to forming a metal layer on the contacts.

12 . The method of claim 10 , further comprising forming a layer of insulating GaN on the second opposing sidewalls of the channels.

13 . The method of claim 10 , wherein the metal layer comprises Ti/W, Ti, Cr, or Ni, or any combination thereof.

14 . The method of claim 10 , wherein the stressor layer comprises nickel, the first metal contacts comprise nickel and silver, and the ohmic contacts comprise a layer of an optically transparent, electrical conductive material comprising indium tin oxide, aluminum-doped zinc oxide, indium-doped cadmium oxide, a transparent conductive polymer, or carbon nanotubes.

15 . The method of claim 10 , further comprising oxidizing the portions of the metal layer under the first channels between the insulating GaN/first metal contacts and the stressor layer to increase the electrical isolation between the device structures.

16 - 20 . (canceled)

Assignees

• IBM

Inventors

• Bedell Stephen W
• Fogel Keith E
• Lauro Paul A
• Sadana Devendra K

Classifications

• H10P72/744

  Details of chemical or physical process used for separating the auxiliary support from a device or a wafer · CPC title

• H10D64/011

  of electrodes ohmically coupled to a semiconductor · CPC title

• H10P72/74

  using temporarily an auxiliary support · CPC title

• H10P14/6938

  the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides · CPC title

• H10W20/4446

  Refractory-metal alloys · CPC title