Integrated mems-cmos devices and integrated circuits with mems devices and cmos devices

Patent metadata

Field	Value
Publication number	US-2017121172-A1
Application number	US-201715405911-A
Country	US
Kind code	A1
Filing date	Jan 13, 2017
Priority date	Aug 14, 2015
Publication date	May 4, 2017
Grant date	—

Abstract

Integrated MEMS-CMOS devices and integrated circuits with MEMS devices and CMOS devices are provided. An exemplary integrated MEMS-CMOS device is vertically integrated and includes a substrate having a first side and a second side opposite the first side. Further, the exemplary vertically integrated MEMS-CMOS device includes a CMOS device located in and/or over the first side of the substrate. Also, the exemplary vertically integrated MEMS-CMOS device includes a MEMS device located in and/or under the second side of the substrate.

First claim

What is claimed is:

1 . An integrated circuit comprising:
a semiconductor substrate having a first side and an opposite second side; an interconnect extending through the first side of a semiconductor substrate; a dielectric layer overlying the first side of the semiconductor substrate; a CMOS device in or on the dielectric layer overlying the first side of the semiconductor substrate; a first conductive structure in the dielectric layer and in electrical contact with the interconnect; and a MEMS device under or on the second side of the semiconductor substrate and in electrical connection with the interconnect.

2 . The integrated circuit of claim 1 wherein the CMOS device is in the dielectric layer overlying the first side of the semiconductor substrate.

3 . The integrated circuit of claim 1 wherein a portion of the CMOS device is in the first side of the semiconductor substrate.

5 . The integrated circuit of claim 1 wherein the MEMS device is directly on the second side of the semiconductor substrate.

6 . The integrated circuit of claim 1 wherein the interconnect extends from the first side of the semiconductor substrate to the second side of the semiconductor substrate.

7 . The integrated circuit of claim 1 further comprising a conductive line formed over the dielectric layer and electrically connected to the CMOS device.

8 . The integrated circuit of claim 1 further comprising:
a conductive line formed over the dielectric layer and electrically connected to the CMOS device; and
a protective layer overlying the conductive line and dielectric layer.

9 . The integrated circuit of claim 1 further comprising:
an intermediate layer under the second side of the semiconductor substrate;
a semiconductor layer under the intermediate layer; and
a conductive layer under the semiconductor layer, wherein the MEMS device is formed from the intermediate layer, the semiconductor layer, and the conductive layer.

10 . The integrated circuit of claim 1 further comprising:
an intermediate layer under the second side of the semiconductor substrate;
a semiconductor layer under the intermediate layer;
a conductive layer under the semiconductor layer, wherein the MEMS device is formed from the intermediate layer, the semiconductor layer, and the conductive layer, and
a conductive pad extending through the intermediate layer, the semiconductor layer, and the conductive layer and electrically connecting the MEMS device and the interconnect.

11 . A vertically integrated MEMS-CMOS device comprising:
a semiconductor substrate defining a center plane; an interconnect passing through the center plane of the semiconductor substrate; a CMOS device over the semiconductor substrate and electrically connected to the interconnect; a MEMS device under the semiconductor substrate, wherein the center plane is located between the CMOS device and the MEMS device; and a conductive structure under the semiconductor substrate and electrically connected to the interconnect to electrically connect the CMOS device and the MEMS device via the interconnect extending through the semiconductor substrate.

12 . The vertically integrated MEMS-CMOS device of claim 11 further comprising a dielectric layer overlying the semiconductor substrate, wherein the CMOS device is in or on the dielectric layer.

13 . The vertically integrated MEMS-CMOS device of claim 12 wherein a portion of the CMOS device is in the semiconductor substrate.

14 . The vertically integrated MEMS-CMOS device of claim 11 wherein the MEMS device is directly on the semiconductor substrate.

15 . The vertically integrated MEMS-CMOS device of claim 11 wherein the interconnect extends from the CMOS device to the MEMS device.

16 . The vertically integrated MEMS-CMOS device of claim 11 further comprising:
a dielectric layer overlying the semiconductor substrate, wherein the CMOS device is in or on the dielectric layer; and
a conductive line formed over the dielectric layer and electrically connected to the CMOS device.

17 . The vertically integrated MEMS-CMOS device of claim 11 further comprising:
a dielectric layer overlying the semiconductor substrate, wherein the CMOS device is in or on the dielectric layer;
a conductive line formed over the dielectric layer and electrically connected to the CMOS device; and
a protective layer overlying the conductive line and dielectric layer.

18 . The vertically integrated MEMS-CMOS device of claim 11 further comprising:
an intermediate layer under the semiconductor substrate;
a semiconductor layer under the intermediate layer; and
a conductive layer under the semiconductor layer, wherein the MEMS device is formed from the intermediate layer, the semiconductor layer, and the conductive layer.

19 . The vertically integrated MEMS-CMOS device of claim 11 further comprising:
an intermediate layer under the semiconductor substrate;
a semiconductor layer under the intermediate layer;
a conductive layer under the semiconductor layer, wherein the MEMS device is formed from the intermediate layer, the semiconductor layer, and the conductive layer, and wherein the conductive structure extends through the intermediate layer, the semiconductor layer, and the conductive layer.

20 . A vertically integrated MEMS-CMOS device comprising:
a substrate having a first side and a second side opposite the first side; a CMOS device located in and/or over the first side of the substrate; and a MEMS device located in and/or under the second side of the substrate.

Assignees

• Globalfoundries Sg Pte Ltd

Inventors

• Xia jia jie
• Ranganathan Nagarajan
• Kumar Rakesh
• Chatterjee Aveek Nath

Classifications

• B81C2201/053

  Depositing a protective layers · CPC title

• B81B2207/015

  the micromechanical device and the control or processing electronics being integrated on the same substrate · CPC title

• B81C2201/019

  Bonding or gluing multiple substrate layers · CPC title

• B81C2203/0735

  Post-CMOS, i.e. forming the micromechanical structure after the CMOS circuit · CPC title

• B81B7/007 Primary

  Interconnections between the MEMS and external electrical signals · CPC title